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Pdr dynamic telemetry #100

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134 changes: 65 additions & 69 deletions plugins/pdr_deterministic_plugin/build/config/Field_BER_Thresholds.csv
Original file line number Diff line number Diff line change
@@ -1,69 +1,65 @@
ASIC,Protocol,Speed,FEC TYPE,FEC OPCODE,Media Type,Pre-FEC BER Error,Pre-FEC BER Warning,Pre-FEC BER Normal,Post-FEC BER Error,Post-FEC BER Warning,Post-FEC BER Normal,Symbol BER Error,Symbol BER Warning,Symbol BER Normal,Version
7nm,IB,NDR,Ethernet_Consortium_LL_50G_RS_FEC_PLR (14),14,DACs,1.00E-06,5.00E-07,1.00E-07,1.00E-11,5.00E-12,1.00E-12,1.00E-14,5.00E-15,1.00E-15,V05
7nm,IB,NDR,Ethernet_Consortium_LL_50G_RS_FEC_PLR (14),14,ACC,1.00E-06,5.00E-07,1.00E-07,1.00E-11,5.00E-12,1.00E-12,1.00E-14,5.00E-15,1.00E-15,V05
7nm,IB,NDR,Ethernet_Consortium_LL_50G_RS_FEC_PLR (14),14,Active,1.00E-05,5.00E-06,1.00E-06,1.00E-11,5.00E-12,1.00E-12,1.00E-14,5.00E-15,1.00E-15,V05
7nm,IB,NDR,Ethernet_Consortium_LL_50G_RS_FEC_PLR (14),14,Active_DiD,1.00E-05,5.00E-06,1.00E-06,1.00E-11,5.00E-12,1.00E-12,1.00E-14,5.00E-15,1.00E-15,V05
7nm,IB,NDR,KP4 Standard_RS-FEC_PLR (12),12,DACs,1.00E-06,5.00E-07,1.00E-07,1.00E-11,5.00E-12,1.00E-12,1.00E-14,5.00E-15,1.00E-15,V05
7nm,IB,NDR,KP4 Standard_RS-FEC_PLR (12),12,ACCs,1.00E-06,5.00E-07,1.00E-07,1.00E-11,5.00E-12,1.00E-12,1.00E-14,5.00E-15,1.00E-15,V05
7nm,IB,NDR,KP4 Standard_RS-FEC_PLR (12),12,Active,1.00E-05,5.00E-06,1.00E-06,1.00E-11,5.00E-12,1.00E-12,1.00E-14,5.00E-15,1.00E-15,V05
7nm,IB,NDR,KP4 Standard_RS-FEC_PLR (12),12,Active_DiD,1.00E-05,5.00E-06,1.00E-06,1.00E-11,5.00E-12,1.00E-12,1.00E-14,5.00E-15,1.00E-15,V05
7nm,IB,NDR,KP4 Standard_RS-FEC (7),7,DACs,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
7nm,IB,NDR,KP4 Standard_RS-FEC (7),7,ACCs,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
7nm,IB,NDR,KP4 Standard_RS-FEC (7),7,Active,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
7nm,IB,NDR,KP4 Standard_RS-FEC (7),7,Active_DiD,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
7nm,IB,HDR,KP4 Standard_RS-FEC +PLR (13),13,DACs,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-14,5.00E-15,1.00E-15,V05
7nm,IB,HDR,KP4 Standard_RS-FEC +PLR (13),13,ACCs,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-14,5.00E-15,1.00E-15,V05
7nm,IB,HDR,KP4 Standard_RS-FEC +PLR (13),13,Active,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-14,5.00E-15,1.00E-15,V05
7nm,IB,HDR,KP4 Standard_RS-FEC +PLR (13),13,Active_DiD,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-14,5.00E-15,1.00E-15,V05
7nm,IB,HDR,KP4 Standard_RS-FEC (7),7,DACs,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
7nm,IB,HDR,KP4 Standard_RS-FEC (7),7,ACCs,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
7nm,IB,HDR,KP4 Standard_RS-FEC (7),7,Active,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
7nm,IB,HDR,KP4 Standard_RS-FEC (7),7,Active_DiD,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
7nm,IB,HDR,"LL-FEC - (271,257) + PLR (13)",13,DACs,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-14,5.00E-15,1.00E-15,V05
7nm,IB,HDR,"LL-FEC - (271,257) + PLR (13)",13,ACCs,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-14,5.00E-15,1.00E-15,V05
7nm,IB,HDR,"LL-FEC - (271,257) + PLR (13)",13,Active,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-14,5.00E-15,1.00E-15,V05
7nm,IB,HDR,"LL-FEC - (271,257) + PLR (13)",13,Active_DiD,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-14,5.00E-15,1.00E-15,V05
7nm,IB,HDR,"Standard_LL_RS_FEC - RS(271,257) (3)",3,DACs,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
7nm,IB,HDR,"Standard_LL_RS_FEC - RS(271,257) (3)",3,ACCs,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
7nm,IB,HDR,"Standard_LL_RS_FEC - RS(271,257) (3)",3,Active,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
7nm,IB,HDR,"Standard_LL_RS_FEC - RS(271,257) (3)",3,Active_DiD,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
7nm,IB,EDR,STD_LL_RS (3),3,DACs,1.00E-12,5.00E-13,1.00E-13,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
7nm,IB,EDR,STD_LL_RS (3),3,ACCs,1.00E-12,5.00E-13,1.00E-13,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
7nm,IB,EDR,STD_LL_RS (3),3,Active,1.00E-12,5.00E-13,1.00E-13,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
7nm,IB,EDR,STD_LL_RS (3),3,Active_DiD,1.00E-12,5.00E-13,1.00E-13,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
7nm,IB,EDR,STD_RS (2),2,DACs,1.00E-12,5.00E-13,1.00E-13,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
7nm,IB,EDR,STD_RS (2),2,ACCs,1.00E-12,5.00E-13,1.00E-13,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
7nm,IB,EDR,STD_RS (2),2,Active,1.00E-12,5.00E-13,1.00E-13,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
7nm,IB,EDR,STD_RS (2),2,Active_DiD,1.00E-12,5.00E-13,1.00E-13,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
7nm,IB,EDR,NO_FEC (0),0,DACs,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
7nm,IB,EDR,NO_FEC (0),0,ACCs,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
7nm,IB,EDR,NO_FEC (0),0,Active,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
7nm,IB,EDR,NO_FEC (0),0,Active_DiD,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
16nm,IB,HDR,KP4 Standard_RS-FEC_PLR (12),12,DACs,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
16nm,IB,HDR,KP4 Standard_RS-FEC_PLR (12),12,ACCs,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
16nm,IB,HDR,KP4 Standard_RS-FEC_PLR (12),12,Active,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
16nm,IB,HDR,KP4 Standard_RS-FEC_PLR (12),12,Active_DiD,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
16nm,IB,HDR,KP4 Standard_RS-FEC (7),7,DACs,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
16nm,IB,HDR,KP4 Standard_RS-FEC (7),7,ACCs,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
16nm,IB,HDR,KP4 Standard_RS-FEC (7),7,Active,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
16nm,IB,HDR,KP4 Standard_RS-FEC (7),7,Active_DiD,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
16nm,IB,HDR,"LL-FEC - (271,257) + PLR (13)",13,DACs,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
16nm,IB,HDR,"LL-FEC - (271,257) + PLR (13)",13,ACCs,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
16nm,IB,HDR,"LL-FEC - (271,257) + PLR (13)",13,Active,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
16nm,IB,HDR,"LL-FEC - (271,257) + PLR (13)",13,Active_DiD,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
16nm,IB,HDR,"Standard_LL_RS_FEC - RS(271,257) (3)",3,DACs,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
16nm,IB,HDR,"Standard_LL_RS_FEC - RS(271,257) (3)",3,ACCs,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
16nm,IB,HDR,"Standard_LL_RS_FEC - RS(271,257) (3)",3,Active,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
16nm,IB,HDR,"Standard_LL_RS_FEC - RS(271,257) (3)",3,Active_DiD,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
16nm,IB,EDR,STD_LL_RS (3),3,DACs,1.00E-12,5.00E-13,1.00E-13,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
16nm,IB,EDR,STD_LL_RS (3),3,ACCs,1.00E-12,5.00E-13,1.00E-13,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
16nm,IB,EDR,STD_LL_RS (3),3,Active,1.00E-12,5.00E-13,1.00E-13,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
16nm,IB,EDR,STD_LL_RS (3),3,Active_DiD,1.00E-12,5.00E-13,1.00E-13,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
16nm,IB,EDR,STD_RS (2),2,DACs,1.00E-09,5.00E-10,1.00E-10,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
16nm,IB,EDR,STD_RS (2),2,ACCs,1.00E-09,5.00E-10,1.00E-10,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
16nm,IB,EDR,STD_RS (2),2,Active,1.00E-09,5.00E-10,1.00E-10,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
16nm,IB,EDR,STD_RS (2),2,Active_DiD,1.00E-09,5.00E-10,1.00E-10,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
16nm,IB,EDR,NO_FEC (0),0,DACs,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
16nm,IB,EDR,NO_FEC (0),0,ACCs,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
16nm,IB,EDR,NO_FEC (0),0,Active,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
16nm,IB,EDR,NO_FEC (0),0,Active_DiD,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V05
ASIC,Protocol,Speed,FEC TYPE,FEC OPCODE vs MAD ,FEC OPCODE,Media Type,Pre-FEC BER Error,Pre-FEC BER Warning,Pre-FEC BER Normal,Post-FEC BER Error,Post-FEC BER Warning,Post-FEC BER Normal,Symbol BER Error,Symbol BER Warning,Symbol BER Normal,Version
7nm,IB,NDR,Ethernet_Consortium_LL_50G_RS_FEC_PLR (14),14,14,DACs,1.00E-06,5.00E-07,1.00E-07,1.00E-11,5.00E-12,1.00E-12,1.00E-14,5.00E-15,1.00E-15,V06
7nm,IB,NDR,Ethernet_Consortium_LL_50G_RS_FEC_PLR (14),14,14,ACC,1.00E-06,5.00E-07,1.00E-07,1.00E-11,5.00E-12,1.00E-12,1.00E-14,5.00E-15,1.00E-15,V06
7nm,IB,NDR,Ethernet_Consortium_LL_50G_RS_FEC_PLR (14),14,14,Active,1.00E-05,5.00E-06,1.00E-06,1.00E-11,5.00E-12,1.00E-12,1.00E-14,5.00E-15,1.00E-15,V06
7nm,IB,NDR,Ethernet_Consortium_LL_50G_RS_FEC_PLR (14),14,14,Active_DiD,1.00E-05,5.00E-06,1.00E-06,1.00E-11,5.00E-12,1.00E-12,1.00E-14,5.00E-15,1.00E-15,V06
7nm,IB,NDR,KP4_Standard_RS_FEC_PLR (12),13,12,DACs,1.00E-06,5.00E-07,1.00E-07,1.00E-11,5.00E-12,1.00E-12,1.00E-14,5.00E-15,1.00E-15,V06
7nm,IB,NDR,KP4_Standard_RS_FEC_PLR (12),13,12,ACC,1.00E-06,5.00E-07,1.00E-07,1.00E-11,5.00E-12,1.00E-12,1.00E-14,5.00E-15,1.00E-15,V06
7nm,IB,NDR,KP4_Standard_RS_FEC_PLR (12),13,12,Active,1.00E-05,5.00E-06,1.00E-06,1.00E-11,5.00E-12,1.00E-12,1.00E-14,5.00E-15,1.00E-15,V06
7nm,IB,NDR,KP4_Standard_RS_FEC_PLR (12),13,12,Active_DiD,1.00E-05,5.00E-06,1.00E-06,1.00E-11,5.00E-12,1.00E-12,1.00E-14,5.00E-15,1.00E-15,V06
7nm,IB,NDR,KP4_Standard_RS_FEC (7),4,7,DACs,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
7nm,IB,NDR,KP4_Standard_RS_FEC (7),4,7,ACC,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
7nm,IB,NDR,KP4_Standard_RS_FEC (7),4,7,Active,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
7nm,IB,NDR,KP4_Standard_RS_FEC (7),4,7,Active_DiD,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
7nm,IB,HDR,KP4_Standard_RS_FEC_PLR (12),13,12,DACs,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-14,5.00E-15,1.00E-15,V06
7nm,IB,HDR,KP4_Standard_RS_FEC_PLR (12),13,12,ACC,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-14,5.00E-15,1.00E-15,V06
7nm,IB,HDR,KP4_Standard_RS_FEC_PLR (12),13,12,Active,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-14,5.00E-15,1.00E-15,V06
7nm,IB,HDR,KP4_Standard_RS_FEC_PLR (12),13,12,Active_DiD,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-14,5.00E-15,1.00E-15,V06
7nm,IB,HDR,KP4_Standard_RS_FEC (7),4,7,DACs,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
7nm,IB,HDR,KP4_Standard_RS_FEC (7),4,7,ACC,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
7nm,IB,HDR,KP4_Standard_RS_FEC (7),4,7,Active,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
7nm,IB,HDR,KP4_Standard_RS_FEC (7),4,7,Active_DiD,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
7nm,IB,HDR,LL_FEC_PLR (13),14,13,DACs,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-14,5.00E-15,1.00E-15,V06
7nm,IB,HDR,LL_FEC_PLR (13),14,13,ACC,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-14,5.00E-15,1.00E-15,V06
7nm,IB,HDR,LL_FEC_PLR (13),14,13,Active,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-14,5.00E-15,1.00E-15,V06
7nm,IB,HDR,LL_FEC_PLR (13),14,13,Active_DiD,1.00E-07,5.00E-08,1.00E-08,1.00E-13,5.00E-14,1.00E-14,1.00E-14,5.00E-15,1.00E-15,V06
7nm,IB,EDR,STD_LL_RS (3),3,3,DACs,1.00E-12,5.00E-13,1.00E-13,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
7nm,IB,EDR,STD_LL_RS (3),3,3,ACC,1.00E-12,5.00E-13,1.00E-13,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
7nm,IB,EDR,STD_LL_RS (3),3,3,Active,1.00E-12,5.00E-13,1.00E-13,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
7nm,IB,EDR,STD_LL_RS (3),3,3,Active_DiD,1.00E-12,5.00E-13,1.00E-13,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
7nm,IB,EDR,STD_RS (2),2,2,DACs,1.00E-12,5.00E-13,1.00E-13,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
7nm,IB,EDR,STD_RS (2),2,2,ACC,1.00E-12,5.00E-13,1.00E-13,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
7nm,IB,EDR,STD_RS (2),2,2,Active,1.00E-12,5.00E-13,1.00E-13,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
7nm,IB,EDR,STD_RS (2),2,2,Active_DiD,1.00E-12,5.00E-13,1.00E-13,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
7nm,IB,EDR,NO_FEC (0),0,0,DACs,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
7nm,IB,EDR,NO_FEC (0),0,0,ACC,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
7nm,IB,EDR,NO_FEC (0),0,0,Active,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
7nm,IB,EDR,NO_FEC (0),0,0,Active_DiD,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
16nm,IB,HDR,KP4_Standard_RS_FEC_PLR (12),13,12,DACs,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
16nm,IB,HDR,KP4_Standard_RS_FEC_PLR (12),13,12,ACC,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
16nm,IB,HDR,KP4_Standard_RS_FEC_PLR (12),13,12,Active,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
16nm,IB,HDR,KP4_Standard_RS_FEC_PLR (12),13,12,Active_DiD,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
16nm,IB,HDR,KP4_Standard_RS_FEC (7),4,7,DACs,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
16nm,IB,HDR,KP4_Standard_RS_FEC (7),4,7,ACC,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
16nm,IB,HDR,KP4_Standard_RS_FEC (7),4,7,Active,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
16nm,IB,HDR,KP4_Standard_RS_FEC (7),4,7,Active_DiD,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
16nm,IB,HDR,LL_FEC_PLR (13),14,13,DACs,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
16nm,IB,HDR,LL_FEC_PLR (13),14,13,ACC,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
16nm,IB,HDR,LL_FEC_PLR (13),14,13,Active,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
16nm,IB,HDR,LL_FEC_PLR (13),14,13,Active_DiD,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
16nm,IB,HDR,STD_LL_RS (3),3,3,DACs,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
16nm,IB,HDR,STD_LL_RS (3),3,3,ACC,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
16nm,IB,HDR,STD_LL_RS (3),3,3,Active,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
16nm,IB,HDR,STD_LL_RS (3),3,3,Active_DiD,1.00E-05,5.00E-06,1.00E-06,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
16nm,IB,EDR,STD_LL_RS (3),3,3,DACs,1.00E-12,5.00E-13,1.00E-13,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
16nm,IB,EDR,STD_LL_RS (3),3,3,ACC,1.00E-12,5.00E-13,1.00E-13,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
16nm,IB,EDR,STD_LL_RS (3),3,3,Active,1.00E-12,5.00E-13,1.00E-13,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
16nm,IB,EDR,STD_LL_RS (3),3,3,Active_DiD,1.00E-12,5.00E-13,1.00E-13,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
16nm,IB,EDR,STD_RS (2),2,2,DACs,1.00E-09,5.00E-10,1.00E-10,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
16nm,IB,EDR,STD_RS (2),2,2,ACC,1.00E-09,5.00E-10,1.00E-10,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
16nm,IB,EDR,STD_RS (2),2,2,Active,1.00E-09,5.00E-10,1.00E-10,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
16nm,IB,EDR,STD_RS (2),2,2,Active_DiD,1.00E-09,5.00E-10,1.00E-10,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
16nm,IB,EDR,NO_FEC (0),0,0,DACs,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
16nm,IB,EDR,NO_FEC (0),0,0,ACC,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
16nm,IB,EDR,NO_FEC (0),0,0,Active,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
16nm,IB,EDR,NO_FEC (0),0,0,Active_DiD,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,1.00E-13,5.00E-14,1.00E-14,V06
2 changes: 2 additions & 0 deletions plugins/pdr_deterministic_plugin/build/docker_build.sh
Original file line number Diff line number Diff line change
Expand Up @@ -100,6 +100,8 @@ pushd ${SCRIPT_DIR}
BUILD_DIR=$(create_out_dir)

cp Dockerfile ${BUILD_DIR}
curl -l -k 'https://l-webdev01:28443/raw/golan_fw.git/master_rc/docs!Field_BER_Thresholds.csv' -o Field_BER_Thresholds.csv
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is there an external github repo that can be used? if the server is down, we won't be able to create the PDR plugin image...

mv -f Field_BER_Thresholds.csv config
cp -r config ${BUILD_DIR}
cp -r scripts ${BUILD_DIR}
cp -r ../ufm_sim_web_service ${BUILD_DIR}
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -399,6 +399,7 @@ def update_port_metadata(self, port_name, port):


def update_ports_data(self):
# update the ports metadata,
meta_data = self.ufm_client.get_ports_metadata()
ports_updated = False
if meta_data and len(meta_data) > 0:
Expand Down Expand Up @@ -442,8 +443,7 @@ def get_isolation_state(self):

def start_telemetry_session(self):
self.logger.info("Starting telemetry session")
guids = self.get_requested_guids()
response = self.ufm_client.start_dynamic_session(Constants.PDR_DYNAMIC_NAME, self.telemetry_counters, self.t_isolate, guids)
response = self.ufm_client.start_dynamic_session(Constants.PDR_DYNAMIC_NAME, self.telemetry_counters, self.t_isolate, [])
if response and response.status_code == http.HTTPStatus.ACCEPTED:
port = str(int(response.content))
else:
Expand Down Expand Up @@ -518,8 +518,6 @@ def main_flow(self):
if self.automatic_deisolate or cause == Constants.ISSUE_OONOC or state == Constants.STATE_TREATED:
self.eval_deisolate(port_state.name)
ports_updated = self.update_ports_data()
if ports_updated:
self.update_telemetry_session()
t_end = time.time()
except Exception as e:
self.logger.warning("Error in main loop")
Expand Down