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backup code, flashxip mode wip
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Signed-off-by: Huaqi Fang <[email protected]>
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fanghuaqi committed Jun 3, 2024
1 parent a30498d commit 5be3694
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Showing 6 changed files with 10 additions and 25 deletions.
8 changes: 1 addition & 7 deletions OS/FreeRTOS/Source/portable/IAR/portasm.S
Original file line number Diff line number Diff line change
Expand Up @@ -37,7 +37,7 @@
#define portCONTEXT_SIZE ( portRegNum * REGBYTES )


PUBLIC prvPortStartFirstTask, eclic_msip_handler
PUBLIC prvPortStartFirstTask, irqc_msip_handler
EXTERN xPortTaskSwitch
EXTERN pxCurrentTCB
EXTERN CSTACK$$Limit
Expand All @@ -55,8 +55,6 @@ prvPortStartFirstTask:
before the scheduler is started is
no longer required after the scheduler is started.
Interrupt stack pointer is stored in CSR_MSCRATCH */
la t0, CSTACK$$Limit
csrw CSR_MSCRATCH, t0
LOAD sp, pxCurrentTCB /* Load pxCurrentTCB. */
LOAD sp, 0x0(sp) /* Read sp from first TCB member */

Expand Down Expand Up @@ -198,8 +196,4 @@ irqc_msip_handler:
addi sp, sp, portCONTEXT_SIZE
mret

default_intexc_handler:
Undef_Handler:
j Undef_Handler

END
8 changes: 3 additions & 5 deletions OS/RTThread/libcpu/risc-v/nuclei/iar/context_iar.S
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@
*
* Change Logs:
* Date Author Notes
* 2023/09/15 Huaqi First Nuclei RISC-V porting implementation For IAR CC
* 2024/06/03 Huaqi First Nuclei N100 RISC-V porting implementation For IAR CC
*/

#include "riscv_encoding.h"
Expand All @@ -22,7 +22,7 @@
EXTERN rt_interrupt_to_thread
EXTERN CSTACK$$Limit
EXTERN xPortTaskSwitch
PUBLIC rt_hw_context_switch_to, eclic_msip_handler
PUBLIC rt_hw_context_switch_to, irqc_msip_handler

SECTION `.text`:CODE:NOROOT(2)
CODE
Expand All @@ -43,8 +43,6 @@ rt_hw_context_switch_to:
before the scheduler is started is
no longer required after the scheduler is started.
Interrupt stack pointer is stored in CSR_MSCRATCH */
la t0, CSTACK$$Limit
csrw CSR_MSCRATCH, t0
LOAD sp, 0x0(a0) /* Read sp from first TCB member(a0) */

/* Pop PC from stack and set MEPC */
Expand Down Expand Up @@ -91,7 +89,7 @@ rt_hw_context_switch_to:
mret

ALIGN 2
eclic_msip_handler:
irqc_msip_handler:
addi sp, sp, -portCONTEXT_SIZE
STORE x1, 1 * REGBYTES(sp) /* RA */
STORE x5, 2 * REGBYTES(sp)
Expand Down
1 change: 0 additions & 1 deletion OS/UCOSII/arch/os_cpu_port.c
Original file line number Diff line number Diff line change
Expand Up @@ -54,7 +54,6 @@ void vPortSetupTimerInterrupt(void);
*/
#define xPortSysTickHandler irqc_mtip_handler

void xPortSysTickHandler(void);

/*
* Start first task is a separate function so it can be tested in isolation.
Expand Down
8 changes: 4 additions & 4 deletions ideprojects/iar/baremetal/helloworld.ewp
Original file line number Diff line number Diff line change
Expand Up @@ -125,7 +125,7 @@
</option>
<option>
<name>GDeviceSelectSlave</name>
<state>N300 Nuclei N300</state>
<state>N200 Nuclei N200</state>
</option>
<option>
<name>GGeneralAutoVectorSetup</name>
Expand Down Expand Up @@ -258,11 +258,11 @@
</option>
<option>
<name>GDeviceCryptoNistSlave</name>
<state>1</state>
<state>0</state>
</option>
<option>
<name>GDeviceCryptoShangMiSlave</name>
<state>1</state>
<state>0</state>
</option>
<option>
<name>GGeneralMisalignedDataAccess</name>
Expand Down Expand Up @@ -755,7 +755,7 @@
</option>
<option>
<name>IlinkIcfFile</name>
<state>$PROJ_DIR$\..\..\..\SoC\evalsoc\Board\nuclei_fpga_eval\Source\IAR\iar_evalsoc_ilm.icf</state>
<state>$PROJ_DIR$\..\..\..\SoC\evalsoc\Board\nuclei_fpga_eval\Source\IAR\iar_evalsoc_flashxip.icf</state>
</option>
<option>
<name>IlinkIcfFileSlave</name>
Expand Down
7 changes: 2 additions & 5 deletions ideprojects/iar/rtos/rtthread_demo.ewp
Original file line number Diff line number Diff line change
Expand Up @@ -258,11 +258,11 @@
</option>
<option>
<name>GDeviceCryptoNistSlave</name>
<state>1</state>
<state>0</state>
</option>
<option>
<name>GDeviceCryptoShangMiSlave</name>
<state>1</state>
<state>0</state>
</option>
<option>
<name>GGeneralMisalignedDataAccess</name>
Expand Down Expand Up @@ -2213,9 +2213,6 @@
<file>
<name>$PROJ_DIR$\..\..\..\OS\RTThread\libcpu\risc-v\nuclei\iar\context_iar.S</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\OS\RTThread\libcpu\risc-v\nuclei\iar\interrupt_iar.S</name>
</file>
</group>
<file>
<name>$PROJ_DIR$\..\..\..\OS\RTThread\libcpu\risc-v\nuclei\cpuport.c</name>
Expand Down
3 changes: 0 additions & 3 deletions ideprojects/iar/rtos/rtthread_msh.ewp
Original file line number Diff line number Diff line change
Expand Up @@ -2241,9 +2241,6 @@
<file>
<name>$PROJ_DIR$\..\..\..\OS\RTThread\libcpu\risc-v\nuclei\iar\context_iar.S</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\OS\RTThread\libcpu\risc-v\nuclei\iar\interrupt_iar.S</name>
</file>
</group>
<file>
<name>$PROJ_DIR$\..\..\..\OS\RTThread\libcpu\risc-v\nuclei\cpuport.c</name>
Expand Down

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