v2.0.0-beta.5

[SC64] Added assets to release package

v2.0.0-beta.4

[SC64][SW] Added option for setting CIC parameters through sc64.py sc…

v2.0.0-beta.3

[SC64][FW] Updated FT232H config

v2.0.0-beta.2

[SC64][SW] SW programing bug fixes

v2.0.0-beta.1

[SC64][SW] Added board bring-up via UART header (#20)

* [SC64][SW] Added board bring-up via UART header

* [SC64][SW] Made I2C in primer stable

* [SC64][SW] LCMXO2 primer fixes

* [SC64][SW] SC64 primer PC software

* [SC64][SW] Added primer.py to release package

* [SC64][SW] Fixed FPGA refresh

* [SC64][SW] Changed release package contents

v2.0.0-alpha.1

[SC64][SW] Fix linguist-vendored

v0.7.0

[SC64][FW][SW] Added 64DD implementation with USB streaming (#14)

v0.6.5

[SC64][FW][SW] Added escape mechanism in USB, changed N64 boot proced…

v0.6.1

[SC64][FW][SW] Made CPU boot process simpler, UART is now an optional…

v0.6

[SC64][FW][SW] Added command to reconfigure FPGA from software (#10)