[HOTFIX] Fix .altmacro compile issues

[scerzh]

The Root Cause

.altmacro support has been extended in ROCm 6.4 leading to macro arguments are expanded even if they are not preceded by a \. Previously symbols not preceded by a \ were intended to be interpreted as global symbols rather than macro arguments. This is no longer a good practice.

Compiling and Checking the Output Binaries

conv1x1u_bias_activ.s

There are 7 sets of compiling parameters:

/opt/rocm/llvm/bin/clang -x assembler -target amdgcn-amd-amdhsa -mcpu=gfx906 -I. -Wa,-defsym,stride_h=1 -Wa,-defsym,stride_w=1 -Wa,-defsym,img_h=56 -Wa,-defsym,img_w=56 -Wa,-defsym,batch_size=1 -Wa,-defsym,input_channels=64 -Wa,-defsym,output_channels=64 -Wa,-defsym,wei_h=1 -Wa,-defsym,wei_w=1 -Wa,-defsym,pad_h=0 -Wa,-defsym,pad_w=0 -Wa,-defsym,weights_layout=0 -Wa,-defsym,vec_c_in=1 -Wa,-defsym,vec_k_out=1 -Wa,-defsym,vec_c_filter=1 -Wa,-defsym,acc_type=1 -Wa,-defsym,buf_type=1 -Wa,-defsym,input_n_stride=802816 -Wa,-defsym,input_c_stride=12544 -Wa,-defsym,input_h_stride=224 -Wa,-defsym,input_w_stride=4 -Wa,-defsym,output_n_stride=802816 -Wa,-defsym,output_k_stride=12544 -Wa,-defsym,output_h_stride=224 -Wa,-defsym,output_w_stride=4 -Wa,-defsym,filter_k_stride=256 -Wa,-defsym,filter_c_stride=4 -Wa,-defsym,filter_h_stride=4 -Wa,-defsym,filter_w_stride=4 -Wa,-defsym,input_buffer_size=802816 -Wa,-defsym,filter_buffer_size=16384 -Wa,-defsym,output_buffer_size=802816 -Wa,-defsym,ROCM_METADATA_VERSION=5 -Wa,-defsym,read_size=1 -Wa,-defsym,k_mult=4 -Wa,-defsym,chunks_per_wave=4 -Wa,-defsym,chunk_size=1 -Wa,-defsym,n_mult=1 -Wa,-defsym,c_mult=1 -Wa,-defsym,waves_c_in_group=1 -Wa,-defsym,waves_k_in_group=1 -Wa,-defsym,fusion_mode=1 -Wa,-defsym,bias_mode=1 -Wa,-defsym,enable_activ=1 -Wa,-defsym,activ_mode=3 -c conv1x1u_bias_activ.s

/opt/rocm/llvm/bin/clang -x assembler -target amdgcn-amd-amdhsa -mcpu=gfx906 -I. -Wa,-defsym,stride_h=1 -Wa,-defsym,stride_w=1 -Wa,-defsym,img_h=56 -Wa,-defsym,img_w=56 -Wa,-defsym,batch_size=1 -Wa,-defsym,input_channels=64 -Wa,-defsym,output_channels=64 -Wa,-defsym,wei_h=1 -Wa,-defsym,wei_w=1 -Wa,-defsym,pad_h=0 -Wa,-defsym,pad_w=0 -Wa,-defsym,weights_layout=0 -Wa,-defsym,vec_c_in=1 -Wa,-defsym,vec_k_out=1 -Wa,-defsym,vec_c_filter=1 -Wa,-defsym,acc_type=1 -Wa,-defsym,buf_type=1 -Wa,-defsym,input_n_stride=802816 -Wa,-defsym,input_c_stride=12544 -Wa,-defsym,input_h_stride=224 -Wa,-defsym,input_w_stride=4 -Wa,-defsym,output_n_stride=802816 -Wa,-defsym,output_k_stride=12544 -Wa,-defsym,output_h_stride=224 -Wa,-defsym,output_w_stride=4 -Wa,-defsym,filter_k_stride=256 -Wa,-defsym,filter_c_stride=4 -Wa,-defsym,filter_h_stride=4 -Wa,-defsym,filter_w_stride=4 -Wa,-defsym,input_buffer_size=802816 -Wa,-defsym,filter_buffer_size=16384 -Wa,-defsym,output_buffer_size=802816 -Wa,-defsym,ROCM_METADATA_VERSION=5 -Wa,-defsym,read_size=1 -Wa,-defsym,k_mult=8 -Wa,-defsym,chunks_per_wave=2 -Wa,-defsym,chunk_size=16 -Wa,-defsym,n_mult=1 -Wa,-defsym,c_mult=2 -Wa,-defsym,waves_c_in_group=4 -Wa,-defsym,waves_k_in_group=4 -Wa,-defsym,fusion_mode=1 -Wa,-defsym,bias_mode=1 -Wa,-defsym,enable_activ=1 -Wa,-defsym,activ_mode=3 -c conv1x1u_bias_activ.s

/opt/rocm/llvm/bin/clang -x assembler -target amdgcn-amd-amdhsa -mcpu=gfx906 -I. -Wa,-defsym,stride_h=1 -Wa,-defsym,stride_w=1 -Wa,-defsym,img_h=56 -Wa,-defsym,img_w=56 -Wa,-defsym,batch_size=1 -Wa,-defsym,input_channels=64 -Wa,-defsym,output_channels=64 -Wa,-defsym,wei_h=1 -Wa,-defsym,wei_w=1 -Wa,-defsym,pad_h=0 -Wa,-defsym,pad_w=0 -Wa,-defsym,weights_layout=0 -Wa,-defsym,vec_c_in=1 -Wa,-defsym,vec_k_out=1 -Wa,-defsym,vec_c_filter=1 -Wa,-defsym,acc_type=1 -Wa,-defsym,buf_type=1 -Wa,-defsym,input_n_stride=802816 -Wa,-defsym,input_c_stride=12544 -Wa,-defsym,input_h_stride=224 -Wa,-defsym,input_w_stride=4 -Wa,-defsym,output_n_stride=802816 -Wa,-defsym,output_k_stride=12544 -Wa,-defsym,output_h_stride=224 -Wa,-defsym,output_w_stride=4 -Wa,-defsym,filter_k_stride=256 -Wa,-defsym,filter_c_stride=4 -Wa,-defsym,filter_h_stride=4 -Wa,-defsym,filter_w_stride=4 -Wa,-defsym,input_buffer_size=802816 -Wa,-defsym,filter_buffer_size=16384 -Wa,-defsym,output_buffer_size=802816 -Wa,-defsym,ROCM_METADATA_VERSION=5 -Wa,-defsym,read_size=2 -Wa,-defsym,k_mult=8 -Wa,-defsym,chunks_per_wave=4 -Wa,-defsym,chunk_size=64 -Wa,-defsym,n_mult=1 -Wa,-defsym,c_mult=4 -Wa,-defsym,waves_c_in_group=2 -Wa,-defsym,waves_k_in_group=4 -Wa,-defsym,fusion_mode=1 -Wa,-defsym,bias_mode=1 -Wa,-defsym,enable_activ=1 -Wa,-defsym,activ_mode=3 -c conv1x1u_bias_activ.s

/opt/rocm/llvm/bin/clang -x assembler -target amdgcn-amd-amdhsa -mcpu=gfx906 -I. -Wa,-defsym,stride_h=1 -Wa,-defsym,stride_w=1 -Wa,-defsym,img_h=56 -Wa,-defsym,img_w=56 -Wa,-defsym,batch_size=1 -Wa,-defsym,input_channels=64 -Wa,-defsym,output_channels=64 -Wa,-defsym,wei_h=1 -Wa,-defsym,wei_w=1 -Wa,-defsym,pad_h=0 -Wa,-defsym,pad_w=0 -Wa,-defsym,weights_layout=0 -Wa,-defsym,vec_c_in=1 -Wa,-defsym,vec_k_out=1 -Wa,-defsym,vec_c_filter=1 -Wa,-defsym,acc_type=1 -Wa,-defsym,buf_type=1 -Wa,-defsym,input_n_stride=802816 -Wa,-defsym,input_c_stride=12544 -Wa,-defsym,input_h_stride=224 -Wa,-defsym,input_w_stride=4 -Wa,-defsym,output_n_stride=802816 -Wa,-defsym,output_k_stride=12544 -Wa,-defsym,output_h_stride=224 -Wa,-defsym,output_w_stride=4 -Wa,-defsym,filter_k_stride=256 -Wa,-defsym,filter_c_stride=4 -Wa,-defsym,filter_h_stride=4 -Wa,-defsym,filter_w_stride=4 -Wa,-defsym,input_buffer_size=802816 -Wa,-defsym,filter_buffer_size=16384 -Wa,-defsym,output_buffer_size=802816 -Wa,-defsym,ROCM_METADATA_VERSION=5 -Wa,-defsym,read_size=1 -Wa,-defsym,k_mult=16 -Wa,-defsym,chunks_per_wave=4 -Wa,-defsym,chunk_size=64 -Wa,-defsym,n_mult=1 -Wa,-defsym,c_mult=2 -Wa,-defsym,waves_c_in_group=1 -Wa,-defsym,waves_k_in_group=1 -Wa,-defsym,fusion_mode=1 -Wa,-defsym,bias_mode=1 -Wa,-defsym,enable_activ=1 -Wa,-defsym,activ_mode=3 -c conv1x1u_bias_activ.s

/opt/rocm/llvm/bin/clang -x assembler -target amdgcn-amd-amdhsa -mcpu=gfx906 -I. -Wa,-defsym,stride_h=1 -Wa,-defsym,stride_w=1 -Wa,-defsym,img_h=56 -Wa,-defsym,img_w=56 -Wa,-defsym,batch_size=1 -Wa,-defsym,input_channels=64 -Wa,-defsym,output_channels=64 -Wa,-defsym,wei_h=1 -Wa,-defsym,wei_w=1 -Wa,-defsym,pad_h=0 -Wa,-defsym,pad_w=0 -Wa,-defsym,weights_layout=0 -Wa,-defsym,vec_c_in=1 -Wa,-defsym,vec_k_out=1 -Wa,-defsym,vec_c_filter=1 -Wa,-defsym,acc_type=1 -Wa,-defsym,buf_type=1 -Wa,-defsym,input_n_stride=802816 -Wa,-defsym,input_c_stride=12544 -Wa,-defsym,input_h_stride=224 -Wa,-defsym,input_w_stride=4 -Wa,-defsym,output_n_stride=802816 -Wa,-defsym,output_k_stride=12544 -Wa,-defsym,output_h_stride=224 -Wa,-defsym,output_w_stride=4 -Wa,-defsym,filter_k_stride=256 -Wa,-defsym,filter_c_stride=4 -Wa,-defsym,filter_h_stride=4 -Wa,-defsym,filter_w_stride=4 -Wa,-defsym,input_buffer_size=802816 -Wa,-defsym,filter_buffer_size=16384 -Wa,-defsym,output_buffer_size=802816 -Wa,-defsym,ROCM_METADATA_VERSION=5 -Wa,-defsym,read_size=1 -Wa,-defsym,k_mult=8 -Wa,-defsym,chunks_per_wave=8 -Wa,-defsym,chunk_size=16 -Wa,-defsym,n_mult=1 -Wa,-defsym,c_mult=2 -Wa,-defsym,waves_c_in_group=2 -Wa,-defsym,waves_k_in_group=2 -Wa,-defsym,fusion_mode=1 -Wa,-defsym,bias_mode=1 -Wa,-defsym,enable_activ=1 -Wa,-defsym,activ_mode=3 -c conv1x1u_bias_activ.s

/opt/rocm/llvm/bin/clang -x assembler -target amdgcn-amd-amdhsa -mcpu=gfx906 -I. -Wa,-defsym,stride_h=1 -Wa,-defsym,stride_w=1 -Wa,-defsym,img_h=56 -Wa,-defsym,img_w=56 -Wa,-defsym,batch_size=1 -Wa,-defsym,input_channels=64 -Wa,-defsym,output_channels=64 -Wa,-defsym,wei_h=1 -Wa,-defsym,wei_w=1 -Wa,-defsym,pad_h=0 -Wa,-defsym,pad_w=0 -Wa,-defsym,weights_layout=0 -Wa,-defsym,vec_c_in=1 -Wa,-defsym,vec_k_out=1 -Wa,-defsym,vec_c_filter=1 -Wa,-defsym,acc_type=1 -Wa,-defsym,buf_type=1 -Wa,-defsym,input_n_stride=802816 -Wa,-defsym,input_c_stride=12544 -Wa,-defsym,input_h_stride=224 -Wa,-defsym,input_w_stride=4 -Wa,-defsym,output_n_stride=802816 -Wa,-defsym,output_k_stride=12544 -Wa,-defsym,output_h_stride=224 -Wa,-defsym,output_w_stride=4 -Wa,-defsym,filter_k_stride=256 -Wa,-defsym,filter_c_stride=4 -Wa,-defsym,filter_h_stride=4 -Wa,-defsym,filter_w_stride=4 -Wa,-defsym,input_buffer_size=802816 -Wa,-defsym,filter_buffer_size=16384 -Wa,-defsym,output_buffer_size=802816 -Wa,-defsym,ROCM_METADATA_VERSION=5 -Wa,-defsym,read_size=4 -Wa,-defsym,k_mult=8 -Wa,-defsym,chunks_per_wave=7 -Wa,-defsym,chunk_size=32 -Wa,-defsym,n_mult=1 -Wa,-defsym,c_mult=2 -Wa,-defsym,waves_c_in_group=2 -Wa,-defsym,waves_k_in_group=4 -Wa,-defsym,fusion_mode=1 -Wa,-defsym,bias_mode=1 -Wa,-defsym,enable_activ=1 -Wa,-defsym,activ_mode=3 -c conv1x1u_bias_activ.s

/opt/rocm/llvm/bin/clang -x assembler -target amdgcn-amd-amdhsa -mcpu=gfx906 -I. -Wa,-defsym,stride_h=1 -Wa,-defsym,stride_w=1 -Wa,-defsym,img_h=56 -Wa,-defsym,img_w=56 -Wa,-defsym,batch_size=1 -Wa,-defsym,input_channels=64 -Wa,-defsym,output_channels=64 -Wa,-defsym,wei_h=1 -Wa,-defsym,wei_w=1 -Wa,-defsym,pad_h=0 -Wa,-defsym,pad_w=0 -Wa,-defsym,weights_layout=0 -Wa,-defsym,vec_c_in=1 -Wa,-defsym,vec_k_out=1 -Wa,-defsym,vec_c_filter=1 -Wa,-defsym,acc_type=1 -Wa,-defsym,buf_type=1 -Wa,-defsym,input_n_stride=802816 -Wa,-defsym,input_c_stride=12544 -Wa,-defsym,input_h_stride=224 -Wa,-defsym,input_w_stride=4 -Wa,-defsym,output_n_stride=802816 -Wa,-defsym,output_k_stride=12544 -Wa,-defsym,output_h_stride=224 -Wa,-defsym,output_w_stride=4 -Wa,-defsym,filter_k_stride=256 -Wa,-defsym,filter_c_stride=4 -Wa,-defsym,filter_h_stride=4 -Wa,-defsym,filter_w_stride=4 -Wa,-defsym,input_buffer_size=802816 -Wa,-defsym,filter_buffer_size=16384 -Wa,-defsym,output_buffer_size=802816 -Wa,-defsym,ROCM_METADATA_VERSION=5 -Wa,-defsym,read_size=1 -Wa,-defsym,k_mult=8 -Wa,-defsym,chunks_per_wave=2 -Wa,-defsym,chunk_size=16 -Wa,-defsym,n_mult=1 -Wa,-defsym,c_mult=2 -Wa,-defsym,waves_c_in_group=4 -Wa,-defsym,waves_k_in_group=4 -Wa,-defsym,fusion_mode=1 -Wa,-defsym,bias_mode=1 -Wa,-defsym,enable_activ=1 -Wa,-defsym,activ_mode=3 -c conv1x1u_bias_activ.s

Extracting sections:

/opt/rocm/llvm/bin/llvm-objdump --full-contents conv1x1u_bias_activ.o > conv1x1u_bias_activ.txt

xform_data.s

There are 5 sets of compiling parameters:

/opt/rocm/llvm/bin/clang -x assembler -target amdgcn-amd-amdhsa -mcpu=gfx90a:xnack- -I. -Wa,-defsym,acc_type=1 -Wa,-defsym,buf_type=1 -Wa,-defsym,ROCM_METADATA_VERSION=5 -Wa,-defsym,xformx_o_size=5 -Wa,-defsym,xformy_o_size=5 -Wa,-defsym,xformx_d_size=7 -Wa,-defsym,xformy_d_size=7 -Wa,-defsym,xformx_f_size=3 -Wa,-defsym,xformy_f_size=3 -Wa,-defsym,fdilation_w=1 -Wa,-defsym,fdilation_h=1 -Wa,-defsym,MIOPEN_USE_RNE_BFLOAT16=1 -c xform_data.s

/opt/rocm/llvm/bin/clang -x assembler -target amdgcn-amd-amdhsa -mcpu=gfx90a:xnack- -I. -Wa,-defsym,acc_type=1 -Wa,-defsym,buf_type=1 -Wa,-defsym,ROCM_METADATA_VERSION=5 -Wa,-defsym,xformx_o_size=5 -Wa,-defsym,xformy_o_size=5 -Wa,-defsym,xformx_d_size=8 -Wa,-defsym,xformy_d_size=8 -Wa,-defsym,xformx_f_size=4 -Wa,-defsym,xformy_f_size=4 -Wa,-defsym,fdilation_w=1 -Wa,-defsym,fdilation_h=1 -Wa,-defsym,MIOPEN_USE_RNE_BFLOAT16=1 -c xform_data.s

/opt/rocm/llvm/bin/clang -x assembler -target amdgcn-amd-amdhsa -mcpu=gfx90a:xnack- -I. -Wa,-defsym,acc_type=1 -Wa,-defsym,buf_type=1 -Wa,-defsym,ROCM_METADATA_VERSION=5 -Wa,-defsym,xformx_o_size=3 -Wa,-defsym,xformy_o_size=3 -Wa,-defsym,xformx_d_size=6 -Wa,-defsym,xformy_d_size=6 -Wa,-defsym,xformx_f_size=4 -Wa,-defsym,xformy_f_size=4 -Wa,-defsym,fdilation_w=1 -Wa,-defsym,fdilation_h=1 -Wa,-defsym,MIOPEN_USE_RNE_BFLOAT16=1 -c xform_data.s

/opt/rocm/llvm/bin/clang -x assembler -target amdgcn-amd-amdhsa -mcpu=gfx90a:xnack- -I. -Wa,-defsym,acc_type=1 -Wa,-defsym,buf_type=1 -Wa,-defsym,ROCM_METADATA_VERSION=5 -Wa,-defsym,xformx_o_size=3 -Wa,-defsym,xformy_o_size=3 -Wa,-defsym,xformx_d_size=7 -Wa,-defsym,xformy_d_size=7 -Wa,-defsym,xformx_f_size=5 -Wa,-defsym,xformy_f_size=5 -Wa,-defsym,fdilation_w=1 -Wa,-defsym,fdilation_h=1 -Wa,-defsym,MIOPEN_USE_RNE_BFLOAT16=1 -c xform_data.s

/opt/rocm/llvm/bin/clang -x assembler -target amdgcn-amd-amdhsa -mcpu=gfx90a:xnack- -I. -Wa,-defsym,acc_type=1 -Wa,-defsym,buf_type=1 -Wa,-defsym,ROCM_METADATA_VERSION=5 -Wa,-defsym,xformx_o_size=3 -Wa,-defsym,xformy_o_size=3 -Wa,-defsym,xformx_d_size=8 -Wa,-defsym,xformy_d_size=8 -Wa,-defsym,xformx_f_size=6 -Wa,-defsym,xformy_f_size=6 -Wa,-defsym,fdilation_w=1 -Wa,-defsym,fdilation_h=1 -Wa,-defsym,MIOPEN_USE_RNE_BFLOAT16=1 -c xform_data.s

Extracting sections:

/opt/rocm/llvm/bin/llvm-objdump --full-contents xform_data.o > xform_data.txt

Conv_Winograd_Fury_v2_4_1_fp16_fp16acc_f2x3_c16_stride1.s

There are 2 sets of compiling parameters:

/opt/rocm/llvm/bin/clang -x assembler -target amdgcn-amd-amdhsa -mcpu=gfx1100 -I. -Wa,-defsym,ROCM_METADATA_VERSION=5 -mcumode -mwavefrontsize64 -c Conv_Winograd_Fury_v2_4_1_fp16_fp16acc_f2x3_c16_stride1.s

/opt/rocm/llvm/bin/clang -x assembler -target amdgcn-amd-amdhsa -mcpu=gfx1102 -I. -Wa,-defsym,ROCM_METADATA_VERSION=5 -mcumode -mwavefrontsize64 -c Conv_Winograd_Fury_v2_4_1_fp16_fp16acc_f2x3_c16_stride1.s

Extracting sections:

/opt/rocm/llvm/bin/llvm-objdump --full-contents Conv_Winograd_Fury_v2_4_1_fp16_fp16acc_f2x3_c16_stride1.o > Conv_Winograd_Fury_v2_4_1_fp16_fp16acc_f2x3_c16_stride1.txt

Conv_Winograd_Fury_v2_4_1_fp16_fp16acc_f2x3_c32_stride1.s

Compiling:

/opt/rocm/llvm/bin/clang -x assembler -target amdgcn-amd-amdhsa -mcpu=gfx1100 -I. -Wa,-defsym,ROCM_METADATA_VERSION=5 -mcumode -mwavefrontsize64 -c Conv_Winograd_Fury_v2_4_1_fp16_fp16acc_f2x3_c32_stride1.s

Extracting sections:

/opt/rocm/llvm/bin/llvm-objdump --full-contents Conv_Winograd_Fury_v2_4_1_fp16_fp16acc_f2x3_c32_stride1.o > Conv_Winograd_Fury_v2_4_1_fp16_fp16acc_f2x3_c32_stride1.txt

[BrianHarrisonAMD]

Edit: Ill re-review once the additional changes are complete.

[shurale-nkn]

please check line 1069
s_pack_ll_f \stmp, bias+k_off_1, bias+k_off_1, \stmp1

looks like it should be
s_pack_ll_f \stmp0, bias+k_off_1, bias+k_off_1, \stmp1

[scerzh]

Good catch! Also added arg_ prefixes to base and k.

[BrianHarrisonAMD]

Wow nice find.
Wouldn't this have been broken before the .altmacro changes as well?

[scerzh]

Strange a bit, but these changes didn't alter anything in .text section in the output binary

[shurale-nkn]

Well, based on what I see it was just inactive code branch. In any other case, it would not be possible to change the number of macro arguments without harming the program logic.

[scerzh]

Oh, I meant \stmp change didn't affect the binary, macro arguments did.