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12 Open 1 Closed
12 Open 1 Closed
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Issues list

[Interchange] Clock routed through general interconnect
#286 opened Apr 29, 2021 by acomodi
1
FPGA Interchange Global Clock Routing
#284 opened Apr 22, 2021 by gatecat
2 tasks
@gatecat
Test SRL's and SRL chains enhancement New feature or request
#265 opened Mar 29, 2021 by litghost
Implement primitive macro's enhancement New feature or request
#264 opened Mar 29, 2021 by litghost
@gatecat
Fabric placement constraints enhancement New feature or request
#263 opened Mar 29, 2021 by litghost
1
Test and implement CARRY4/XORCY/MUXCY support enhancement New feature or request good first issue Good for newcomers
#262 opened Mar 29, 2021 by litghost
1
Investigate FPGA interchange BEL validity checking improvements enhancement New feature or request
#261 opened Mar 29, 2021 by litghost
FPGA interchange lookahead improvements enhancement New feature or request
#260 opened Mar 29, 2021 by litghost
4
FPGA interchange development road map
#259 opened Mar 29, 2021 by litghost
Need to stand up MSAN / ASAN / TSAN test runs
#238 opened Mar 1, 2021 by litghost
4
Need site routing test framework enhancement New feature or request good first issue Good for newcomers
#234 opened Feb 25, 2021 by litghost
@tmichalak
3
XDC parser enchancements enhancement New feature or request
#232 opened Feb 25, 2021 by litghost
1
ProTip! no:milestone will show everything without a milestone.