Merge pull request verilog-to-routing#2447 from verilog-to-routing/SP…

…EC_update

Change the base cost for IPIN for SPEC

libs/librrgraph/src/utils/alloc_and_load_rr_indexed_data.cpp

@@ -351,7 +351,18 @@ static void load_rr_indexed_data_base_costs(const RRGraphView& rr_graph,
     rr_indexed_data[RRIndexedDataId(SOURCE_COST_INDEX)].base_cost = delay_normalization_fac;
     rr_indexed_data[RRIndexedDataId(SINK_COST_INDEX)].base_cost = 0.;
     rr_indexed_data[RRIndexedDataId(OPIN_COST_INDEX)].base_cost = delay_normalization_fac;
+    // If the SPEC_CPU flag is set, we need to make sure that all floating point numbers are perfectly representable in
+    // binary format. Thus, we changed the IPIN_COST_INDEX base cost from 0.95 to 0.875.
+    // This number is perfectly representable in a binary mantissa (without round-off) so we can get the same routing result on different platforms.
+    // Since the router cost calculations and heap use floating point numbers, normally we get slightly different round off with different compiler settings,
+    // leading to different heap sorts and hence different routings.
+    // To make result validation for SPEC easier, we choose all router parameters to result in calculations that fit perfectly in a 24-bit binary mantissa.
+    // .875 = 1/2 + 1/4 + 1/8 can be perfectly represented in a binary mantissa with only the first 3 bits set.
+#ifdef SPEC_CPU
+    rr_indexed_data[RRIndexedDataId(IPIN_COST_INDEX)].base_cost = 0.875 * delay_normalization_fac;
+#else
     rr_indexed_data[RRIndexedDataId(IPIN_COST_INDEX)].base_cost = 0.95 * delay_normalization_fac;
+#endif
 
     auto rr_segment_counts = count_rr_segment_types(rr_graph, rr_indexed_data);
     size_t total_segments = std::accumulate(rr_segment_counts.begin(), rr_segment_counts.end(), 0u);