[pull] master from verilog-to-routing:master #565
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![pull[bot]](https://avatars.githubusercontent.com/in/12910?s=60&v=4){kind=small}
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removed
VPR
libarchfpga
lang-python
scripts
libvtrutil
tests
liblog
labels
… benchmarks with a single command
Added the read_flat_place option to VPR's CLI. This allows the user to pass a flat placement file into the packer. Added code to parse this file into a FlatPlacementInfo object which only verifies that the atom given in the file exists in the atom netlist. Added code in the packer to read in the flat placement and verify that the flat placement is valid for use in the packer.
As per Vaughn's suggestions, added layer to the flat placement file specification to make it easier to upgrade to 3D FPGAs in the future. Fixed some small documentation issues.
[APPack] Added read_flat_place Option and Verifier
…p_from_docs Remove place_cost_exp from documentation
Increase C++ version from 17 to 20
…::StrongId<tag, T, sentinel>&) noexcept
Added the read_flat_place option to VPR's CLI. This allows the user to pass a flat placement file into the packer. Added code to parse this file into a FlatPlacementInfo object which only verifies that the atom given in the file exists in the atom netlist. Added code in the packer to read in the flat placement and verify that the flat placement is valid for use in the packer.
As per Vaughn's suggestions, added layer to the flat placement file specification to make it easier to upgrade to 3D FPGAs in the future. Fixed some small documentation issues.
…master Add the latest changes from v9.0 branch to the master branch
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