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PeakRDL-uvm
PeakRDL-uvm PublicForked from proukema-fidus/PeakRDL-uvm
Generate UVM register model from compiled SystemRDL input
Python
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PeakRDL-regblock
PeakRDL-regblock PublicForked from proukema-fidus/PeakRDL-regblock
Generate SystemVerilog RTL that implements a register block from compiled SystemRDL input.
Python
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