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update MR related code and tx/rx memory size allocation logic #109

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update MR related code and tx/rx memory size allocation logic #109

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736cc3f
Merge pull request #1 from Wiznet/master
javakys Apr 9, 2021
5ccd64d
W5300 related library updated correctly
javakys Apr 9, 2021
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6 changes: 3 additions & 3 deletions Ethernet/W5300/w5300.h
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Original file line number Diff line number Diff line change
Expand Up @@ -227,7 +227,7 @@ extern "C" {
* - \ref MR_FARP : Force ARP mode
*/
#define MR (_WIZCHIP_IO_BASE_)

//#define MR (0x68000000)
/**
* @ingroup Common_register_group_W5300
* @brief Interrupt Register(R/W)
Expand Down Expand Up @@ -1340,7 +1340,7 @@ void WIZCHIP_WRITE(uint32_t AddrSel, uint16_t wb );
#define setMR(mr) \
(*((uint8_t*)MR) = (uint8_t)((mr) >> 8)); (*((uint8_t*)WIZCHIP_OFFSET_INC(MR,1)) = (uint8_t)((mr) & 0xFF))
#elif (_WIZCHIP_IO_BUS_WIDTH_ == 16)
#define setMR(mr) (*((uint16_t*)MR) = (uint16_t)((mr) & 0xFFFF))
#define setMR(mr) (WIZCHIP_WRITE(MR,(mr & 0xFFFF)))
#else
#error "Unknown _WIZCHIP_IO_BUS_WIDTH_. You should be define _WIZCHIP_IO_BUS_WIDTH as 8 or 16."
#endif
Expand All @@ -1358,7 +1358,7 @@ void WIZCHIP_WRITE(uint32_t AddrSel, uint16_t wb );
#if (_WIZCHIP_IO_BUS_WIDTH_ == 8)
#define getMR() (((uint16_t)(*((uint8_t*)MR)) << 8) + (((uint16_t)(*((uint8_t*)WIZCHIP_OFFSET_INC(MR,1)))) & 0x00FF))
#elif(_WIZCHIP_IO_BUS_WIDTH_ == 16)
#define getMR() (*((uint16_t*)MR))
#define getMR() (WIZCHIP_READ(MR) & 0xFFFF)
#else
#error "Unknown _WIZCHIP_IO_BUS_WIDTH_. You should be define _WIZCHIP_IO_BUS_WIDTH as 8 or 16."
#endif
Expand Down
21 changes: 18 additions & 3 deletions Ethernet/wizchip_conf.c
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Original file line number Diff line number Diff line change
Expand Up @@ -287,6 +287,7 @@ int8_t ctlwizchip(ctlwizchip_type cwtype, void* arg)
uint8_t tmp = 0;
#endif
uint8_t* ptmp[2] = {0,0};
uint8_t i;
switch(cwtype)
{
case CW_RESET_WIZCHIP:
Expand All @@ -298,6 +299,18 @@ int8_t ctlwizchip(ctlwizchip_type cwtype, void* arg)
ptmp[0] = (uint8_t*)arg;
ptmp[1] = ptmp[0] + _WIZCHIP_SOCK_NUM_;
}
printf("tx mem: ");
for(i=0; i<_WIZCHIP_SOCK_NUM_; i++)
{
printf("%d,", ptmp[0][i]);
}
printf("\r\n");
printf("rx mem: ");
for(i=0; i<_WIZCHIP_SOCK_NUM_; i++)
{
printf("%d,", ptmp[1][i]);
}
printf("\r\n");
return wizchip_init(ptmp[0], ptmp[1]);
case CW_CLR_INTERRUPT:
wizchip_clrinterrupt(*((intr_kind*)arg));
Expand Down Expand Up @@ -402,7 +415,9 @@ void wizchip_sw_reset(void)
#endif
//
getSHAR(mac);
getGAR(gw); getSUBR(sn); getSIPR(sip);
getSIPR(sip);
getGAR(gw);
getSUBR(sn);
setMR(MR_RST);
getMR(); // for delay
//A2015051 : For indirect bus mode
Expand Down Expand Up @@ -447,6 +462,7 @@ int8_t wizchip_init(uint8_t* txsize, uint8_t* rxsize)
if(tmp > 16) return -1;
#endif
}
#endif
for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
{
#if _WIZCHIP_ < W5200 //2016.10.28 peter add condition for w5100
Expand All @@ -458,7 +474,6 @@ int8_t wizchip_init(uint8_t* txsize, uint8_t* rxsize)
#endif
}

#endif
}

if(rxsize)
Expand All @@ -482,6 +497,7 @@ int8_t wizchip_init(uint8_t* txsize, uint8_t* rxsize)
if(tmp > 16) return -1;
#endif
}
#endif

for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
{
Expand All @@ -493,7 +509,6 @@ int8_t wizchip_init(uint8_t* txsize, uint8_t* rxsize)
setSn_RXBUF_SIZE(i, rxsize[i]);
#endif
}
#endif
}
return 0;
}
Expand Down
2 changes: 1 addition & 1 deletion Ethernet/wizchip_conf.h
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Original file line number Diff line number Diff line change
Expand Up @@ -199,7 +199,7 @@ extern "C" {
*/
#if _WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_BUS_
// #define _WIZCHIP_IO_BASE_ 0x60000000 // for 5100S IND
#define _WIZCHIP_IO_BASE_ 0x68000000 // for W5300
#define _WIZCHIP_IO_BASE_ 0x34000000 // for W5300
#elif _WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_SPI_
#define _WIZCHIP_IO_BASE_ 0x00000000 // for 5100S SPI
#endif
Expand Down