[RWRoute] Preserve nodes of Laguna sinks (#1104)

* [GlobalSignalRouting] routeStaticNets() to take a list of static pins Expecting that such pins are available (and removing those that are not available, such as in an encrypted design) Signed-off-by: Eddie Hung <[email protected]> * Update javadoc Signed-off-by: Eddie Hung <[email protected]> * Do away with set of PIPs Signed-off-by: Eddie Hung <[email protected]> * Tidying Signed-off-by: Eddie Hung <[email protected]> * Remove unnecessary call Signed-off-by: Eddie Hung <[email protected]> * Update src/com/xilinx/rapidwright/rwroute/RWRoute.java Signed-off-by: eddieh-xlnx <[email protected]> * Update javadoc as per review Signed-off-by: Eddie Hung <[email protected]> * Re-preserve moved sinks, also remove GND net if no sinks left Signed-off-by: Eddie Hung <[email protected]> * [PartialRouter] Always preserve all static sinks Signed-off-by: Eddie Hung <[email protected]> * Only preserve static sink pins Signed-off-by: Eddie Hung <[email protected]> * [GlobalSignalRouting] Do not encourage reuse Signed-off-by: Eddie Hung <[email protected]> * Update golden values Signed-off-by: Eddie Hung <[email protected]> * Preserve static nets only after moving/removing sinks Signed-off-by: Eddie Hung <[email protected]> * Update comment Signed-off-by: Eddie Hung <[email protected]> * No need to represerve sink Signed-off-by: Eddie Hung <[email protected]> * Update comment Signed-off-by: Eddie Hung <[email protected]> * [PartialRouter] Preserve out pins on static nets too Signed-off-by: Eddie Hung <[email protected]> * Duplicate list for staticNetAndRoutingTargets Signed-off-by: Eddie Hung <[email protected]> * Call deferred preserveNet even if no static routing Signed-off-by: Eddie Hung <[email protected]> * Return to preserving static net PIPs and out pins asynchronously Signed-off-by: Eddie Hung <[email protected]> * [RWRoute] Preserve nodes of Laguna sinks Signed-off-by: Eddie Hung <[email protected]> --------- Signed-off-by: Eddie Hung <[email protected]> Signed-off-by: eddieh-xlnx <[email protected]>
Xilinx · Nov 15, 2024 · 9cd25a6 · 9cd25a6
1 parent 6e0764a
commit 9cd25a6
Showing 1 changed file with 11 additions and 0 deletions.
diff --git a/src/com/xilinx/rapidwright/rwroute/RWRoute.java b/src/com/xilinx/rapidwright/rwroute/RWRoute.java
@@ -56,6 +56,7 @@
 import com.xilinx.rapidwright.util.Pair;
 import com.xilinx.rapidwright.util.RuntimeTracker;
 import com.xilinx.rapidwright.util.RuntimeTrackerTree;
+import com.xilinx.rapidwright.util.Utils;
 
 import java.util.ArrayList;
 import java.util.Arrays;
@@ -684,6 +685,16 @@ protected NetWrapper createNetWrapperAndConnections(Net net) {
                 sinkRnode.setType(sinkType);
                 connection.setSinkRnode(sinkRnode);
 
+                if (sinkINTNode.getTile() != sink.getTile()) {
+                    TileTypeEnum sinkTileType = sink.getTile().getTileTypeEnum();
+                    if (Utils.isLaguna(sinkTileType)) {
+                        // Sinks in Laguna tiles must be Laguna registers (but will be projected into the INT tile)
+                        // however, it's possible for another net to use the sink node as a bounce -- prevent that here
+                        assert(sinkINTNode.getTile().getTileTypeEnum() == TileTypeEnum.INT);
+                        routingGraph.preserve(sink.getConnectedNode(), net);
+                    }
+                }
+
                 // Where appropriate, allow all 6 LUT pins to be swapped to begin with
                 char lutLetter = sink.getName().charAt(0);
                 int numberOfSwappablePins = (lutPinSwapping && sink.isLUTInputPin())