Merge branch 'interchange_versal' into large_interchange_designs

Signed-off-by: Chris Lavin <[email protected]>

.classpath

@@ -33,9 +33,9 @@
 	<classpathentry kind="lib" path="jars/kryo-5.2.1.jar"/>
 	<classpathentry kind="lib" path="jars/minlog-1.3.1.jar"/>
 	<classpathentry kind="lib" path="jars/jython-standalone-2.7.2.jar"/>
-	<classpathentry kind="lib" path="jars/rapidwright-api-lib-2024.1.0.jar">
+	<classpathentry kind="lib" path="jars/rapidwright-api-lib-2024.1.1.jar">
 		<attributes>
-			<attribute name="javadoc_location" value="jar:platform:/resource/RapidWright/jars/rapidwright-api-lib-2024.1.0-javadoc.jar!/"/>
+			<attribute name="javadoc_location" value="jar:platform:/resource/RapidWright/jars/rapidwright-api-lib-2024.1.1-javadoc.jar!/"/>
 		</attributes>
 	</classpathentry>
 	<classpathentry kind="lib" path="jars/jgrapht-core-1.3.0.jar"/>

.github/workflows/build.yml

@@ -5,7 +5,7 @@ on:
   pull_request:
 
 env:
-  RAPIDWRIGHT_VERSION: v2024.1.0-beta
+  RAPIDWRIGHT_VERSION: v2024.1.1-beta
 
 jobs:
   build:

.github/workflows/check-git-submodules.yml

@@ -2,8 +2,6 @@ name: Submodule refs on origin
 
 on:
   pull_request:
-    branches:
-      - master
 
 jobs:
   check:

RELEASE_NOTES.TXT

@@ -1,3 +1,37 @@
+============= RapidWright 2024.1.1-beta released on 2024-07-17 ================
+Notes: 
+  - [VivadoTools] Source *_load.tcl from same dir as DCP (#1032)
+  - Test that PIP.isReversed() is correct (#1024)
+  - Add TestSite.testGetIntTile() (#1022)
+  - [EDIFTools] writeTclLoadScriptForPartialEncryptedDesigns abspath (#1029)
+  - Adding HDIOB types (#1028)
+  - Test for site routing from raw placed design (#1000)
+  - [RWRoute] Do not NPE on encrypted netlists (#1025)
+  - [RWRoute] Do not assume Y = 0 has Laguna tiles, since it could be HBM device (#1026)
+  - Adds UNKWN state for LSFJobs (#1027)
+  - Adding legacy support for u280 (#1021)
+  - Remove flawed loop intended to for encrypted cell removal (#1023)
+  - [DesignTools.makeBlackBox()] Fixes an issue of removing CARRY blocks fed by routethrus (#1009)
+  - Fix null netlist pointer on expanded macro children (#1008)
+  - [Interchange] Device Resources Verifier Fixes (#1014)
+  - Fix ConcurrentModificationError (#1015)
+  - [EDIFTools] Adding method to create a flat netlist from a hierarchical one (#1006)
+  - Adding HBM ComponentTypes (#1007)
+  - Test for wire/node mismatch reported in #983 (#1005)
+  - 3.6% memory reduction usage for large placed designs (de-duplication of cell pin strings)
+  - Add missing pin entry for BUFG_GT when tracking INT tile connections
+  - Fixes rare DCP write issue with stubbed bi-directional PIPs (more common on DFX designs)
+  - Fix for reversed flag on PIPs
+  - Addresses issue with Net.getBufferDelay() by checking for null wire names
+  - Fixes two site routing issues
+
+
+API Additions:
+  - (None)
+
+API Removals:
+  - (None)
+
 ============= RapidWright 2024.1.0-beta released on 2024-06-11 ================
 Notes: 
   - Support for Vivado 2024.1 DCPs and devices

python/setup.py

@@ -24,7 +24,7 @@
 
 setup(
     name='rapidwright',
-    version='2024.1.0',
+    version='2024.1.1',
     license='Apache 2.0 and Others',
     description='Xilinx RapidWright Framework Wrapped for Python.',
     long_description='',

python/src/rapidwright/rapidwright.py

@@ -24,7 +24,7 @@
 from typing import List, Optional
 import os, urllib.request, platform
 
-version='2024.1.0'
+version='2024.1.1'
 
 def start_jvm():
     os_str = 'lin64'

src/com/xilinx/rapidwright/interchange/LogNetlistReader.java

@@ -64,7 +64,7 @@
 import java.util.function.Supplier;
 
 public class LogNetlistReader {
-    public static boolean CHECK_UNISIM_DEFINITIONS = true;
+    public static boolean CHECK_UNISIM_DEFINITIONS = false;
 
     private String[] allStrings;
     private EDIFPort[] allPorts;

src/com/xilinx/rapidwright/interchange/PhysNetlistReader.java

@@ -94,7 +94,7 @@ public class PhysNetlistReader {
     protected static final String DISABLE_AUTO_IO_BUFFERS = "DISABLE_AUTO_IO_BUFFERS";
     protected static final String OUT_OF_CONTEXT = "OUT_OF_CONTEXT";
 
-    public static boolean VALIDATE_MACROS_PLACED_FULLY = true;
+    public static boolean VALIDATE_MACROS_PLACED_FULLY = false;
 
     /**
      *  Checks that constant routing and net names are valid.
@@ -107,15 +107,15 @@ public class PhysNetlistReader {
      * macro definition in the library.
      * This incurs a runtime overhead.
      */
-    public static boolean CHECK_MACROS_CONSISTENT = true;
+    public static boolean CHECK_MACROS_CONSISTENT = false;
 
 
     /**
      * When reading placement for physical netlist cells, check for the presence of and
      * consistency with logical netlist cells.
      * This incurs a runtime overhead.
      */
-    public static boolean CHECK_AND_CREATE_LOGICAL_CELL_IF_NOT_PRESENT = true;
+    public static boolean CHECK_AND_CREATE_LOGICAL_CELL_IF_NOT_PRESENT = false;
 
     protected final Design design;
     protected Device device;

src/com/xilinx/rapidwright/interchange/PhysNetlistWriter.java

@@ -352,6 +352,7 @@ public static void extractIntraSiteRouting(Net net, List<RouteBranchNode> nodes,
         final boolean isStaticNet = net.isStaticNet();
         for (String siteWire : siteInst.getSiteWiresFromNet(net)) {
             BELPin[] belPins = siteInst.getSiteWirePins(siteWire);
+            BELPin versalRoutethru = null;
             for (BELPin belPin : belPins) {
                 BEL bel = belPin.getBEL();
                 Cell cell = siteInst.getCell(bel);
@@ -361,6 +362,11 @@ public static void extractIntraSiteRouting(Net net, List<RouteBranchNode> nodes,
                     if (cell == null) {
                         if (belPin.isInput() || !net.isStaticNet()) {
                             // Skip if nothing placed here and cannot be driving a static net
+                            if (bel.getName().equals("LOOKAHEAD8") || (belPin.isOutput() && bel.getName().equals("FF_CLK_MOD"))) {
+                                versalRoutethru = belPin;
+                            } else if (bel.getName().equals("FF_CLK_MOD")) {
+                                nodes.add(new RouteBranchNode(site, belPin, false));
+                            }
                             continue;
                         }
                         assert(bel.isLUT() || // LUTs can be a GND or VCC source
@@ -382,6 +388,9 @@ public static void extractIntraSiteRouting(Net net, List<RouteBranchNode> nodes,
                                 sitePIP = siteInst.getSitePIP(padout.getPin("IN"));
                             } else if (series == Series.Series7) {
                                 sitePIP = siteInst.getSitePIP("IUSED", "0");
+                            } else if (series == Series.Versal) {
+                                // No SitePIPs in HDIOB
+                                continue;
                             } else {
                                 throw new RuntimeException("Unsupported series " + series);
                             }
@@ -482,6 +491,11 @@ public static void extractIntraSiteRouting(Net net, List<RouteBranchNode> nodes,
                     }
                 }
 
+                if (versalRoutethru != null) {
+                    nodes.add(new RouteBranchNode(site, versalRoutethru, routethru));
+                    versalRoutethru = null;
+                }
+
                 nodes.add(new RouteBranchNode(site, belPin, routethru));
             }
         }

src/com/xilinx/rapidwright/util/Utils.java

@@ -397,7 +397,8 @@ public static boolean isIOB(SiteTypeEnum s) {
             SiteTypeEnum.HPIOBDIFFOUTBUF,
             SiteTypeEnum.HRIO,
             SiteTypeEnum.HRIODIFFINBUF,
-            SiteTypeEnum.HRIODIFFOUTBUF
+            SiteTypeEnum.HRIODIFFOUTBUF,
+            SiteTypeEnum.XPIOB
         );
 
         uramTypes = EnumSet.of(

src/com/xilinx/rapidwright/util/VivadoTools.java

@@ -39,6 +39,7 @@ public class VivadoTools {
 
     public static final String REPORT_ROUTE_STATUS = "report_route_status";
     public static final String PLACE_DESIGN = "place_design";
+    public static final String ROUTE_DESIGN = "route_design";
     public static final String WRITE_CHECKPOINT = "write_checkpoint";
     public static final String WRITE_EDIF = "write_edif";
 
@@ -305,7 +306,7 @@ public static String reportRouteStatus(String netName, Path dcp, Path workdir, b
 
     private static String createTclDCPLoadCommand(Path dcp, boolean encrypted) {
         if (encrypted) {
-            Path tclFileName = FileTools.replaceExtension(dcp.getFileName(), EDIFTools.LOAD_TCL_SUFFIX);
+            Path tclFileName = FileTools.replaceExtension(dcp, EDIFTools.LOAD_TCL_SUFFIX);
             return "source {" + tclFileName + "}; ";
         } else {
             return "open_checkpoint {" + dcp + "}; ";
@@ -337,11 +338,49 @@ public static Design placeDesign(Path dcp, Path workdir, boolean encrypted) {
     }
 
     /**
-     * Run Vivado's `get_timing_paths -setup` command on the provided DCP path
-     * (to find its worst setup timing path) and return its SLACK property as a float.
-     *
-     * @param dcp Path to DCP to report on.
+     * Run Vivado's `route_design` command on the design provided and get the
+     * `report_route_status` results. Note: this method does not preserve the routed
+     * output from Vivado.
+     * 
+     * @param design  The design to route and report on.
      * @param workdir Directory to work within.
+     * @return The results of `report_route_status`.
+     */
+    public static ReportRouteStatusResult routeDesignAndGetStatus(Design design, Path workdir) {
+        boolean encrypted = !design.getNetlist().getEncryptedCells().isEmpty();
+        Path dcp = workdir.resolve("routeDesignAndGetStatus.dcp");
+        design.writeCheckpoint(dcp);
+        return routeDesignAndGetStatus(dcp, workdir, encrypted);
+    }
+
+    /**
+     * Run Vivado's `route_design` command on the provided DCP path and return the
+     * `report_route_status` results. Note: this method does not preserve the routed
+     * output from Vivado.
+     *
+     * @param dcp       Path to DCP to route and report on.
+     * @param workdir   Directory to work within.
+     * @param encrypted Indicates whether DCP contains encrypted EDIF cells.
+     * @return The results of `report_route_status`.
+     */
+    public static ReportRouteStatusResult routeDesignAndGetStatus(Path dcp, Path workdir, boolean encrypted) {
+        final Path outputLog = workdir.resolve("outputLog.log");
+
+        StringBuilder sb = new StringBuilder();
+        sb.append(createTclDCPLoadCommand(dcp, encrypted));
+        sb.append(ROUTE_DESIGN + "; ");
+        sb.append(REPORT_ROUTE_STATUS + "; ");
+
+        List<String> log = VivadoTools.runTcl(outputLog, sb.toString(), true);
+        return new ReportRouteStatusResult(log);
+    }
+
+    /**
+     * Run Vivado's `get_timing_paths -setup` command on the provided DCP path (to
+     * find its worst setup timing path) and return its SLACK property as a float.
+     *
+     * @param dcp       Path to DCP to report on.
+     * @param workdir   Directory to work within.
      * @param encrypted Indicates whether DCP contains encrypted EDIF cells.
      * @return Worst slack of design as float.
      */

test/shared/com/xilinx/rapidwright/util/VivadoToolsHelper.java

@@ -22,10 +22,11 @@
 
 package com.xilinx.rapidwright.util;
 
-import com.xilinx.rapidwright.design.Design;
+import java.nio.file.Path;
+
 import org.junit.jupiter.api.Assertions;
 
-import java.nio.file.Path;
+import com.xilinx.rapidwright.design.Design;
 
 public class VivadoToolsHelper {
     public static void assertFullyRouted(Design design) {
@@ -45,4 +46,18 @@ public static void assertFullyRouted(Path dcp) {
         ReportRouteStatusResult rrs = VivadoTools.reportRouteStatus(dcp);
         Assertions.assertTrue(rrs.isFullyRouted());
     }
+
+    /**
+     * Ensures that the provided design can be routed successfully in Vivado.
+     * 
+     * @param design The design to route.
+     * @param dir    The directory to work within.
+     */
+    public static void assertRoutedSuccessfullyByVivado(Design design, Path dir) {
+        if (!FileTools.isVivadoOnPath()) {
+            return;
+        }
+        ReportRouteStatusResult rrs = VivadoTools.routeDesignAndGetStatus(design, dir);
+        Assertions.assertTrue(rrs.isFullyRouted());
+    }
 }

test/src/com/xilinx/rapidwright/design/TestSiteInst.java

@@ -29,11 +29,14 @@
 import com.xilinx.rapidwright.device.Device;
 import com.xilinx.rapidwright.device.Series;
 import com.xilinx.rapidwright.support.RapidWrightDCP;
+import com.xilinx.rapidwright.util.VivadoToolsHelper;
 import org.junit.jupiter.api.Assertions;
 import org.junit.jupiter.api.Test;
+import org.junit.jupiter.api.io.TempDir;
 import org.junit.jupiter.params.ParameterizedTest;
 import org.junit.jupiter.params.provider.ValueSource;
 
+import java.nio.file.Path;
 import java.util.Arrays;
 
 public class TestSiteInst {
@@ -365,4 +368,11 @@ public void testUnrouteSiteUpdatesNetSiteInsts() {
 
         Assertions.assertTrue(net.getSiteInsts().isEmpty());
     }
+
+    @Test
+    public void testSiteRouting(@TempDir Path dir) {
+        Design design = RapidWrightDCP.loadDCP("gnl_2_4_3_1.3_gnl_3000_07_3_80_80_placed.dcp");
+        design.routeSites();
+        VivadoToolsHelper.assertRoutedSuccessfullyByVivado(design, dir);
+    }
 }

test/src/com/xilinx/rapidwright/device/TestNode.java

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2022-2023, Advanced Micro Devices, Inc.
+ * Copyright (c) 2022-2024, Advanced Micro Devices, Inc.
  * All rights reserved.
  *
  * Author: Eddie Hung, Advanced Micro Devices, Inc.
@@ -169,5 +169,39 @@ public void testWireNodeMismatch(String deviceName, String nodeName) {
             Assertions.assertEquals(node, wire.getNode());
         }
     }
+
+    @ParameterizedTest
+    @CsvSource({
+            "xcvu3p,INT_X0Y0/BYPASS_W14,INT_X0Y0/INT.INT_NODE_IMUX_50_INT_OUT0<<->>BYPASS_W14",
+            "xcvu3p,INT_X0Y0/INT_NODE_IMUX_50_INT_OUT0,",
+    })
+    public void testGetAllDownhillPIPsReversed(String deviceName, String startNodeName, String reversedPIPString) {
+        Device d = Device.getDevice(deviceName);
+        Node startNode = d.getNode(startNodeName);
+        for (PIP pip : startNode.getAllDownhillPIPs()) {
+            if (pip.toString().equals(reversedPIPString)) {
+                Assertions.assertTrue(pip.isReversed());
+            } else {
+                Assertions.assertFalse(pip.isReversed());
+            }
+        }
+    }
+
+    @ParameterizedTest
+    @CsvSource({
+            "xcvu3p,INT_X0Y0/INT_NODE_IMUX_50_INT_OUT0,INT_X0Y0/INT.INT_NODE_IMUX_50_INT_OUT0<<->>BYPASS_W14",
+            "xcvu3p,INT_X0Y0/BYPASS_W14,",
+    })
+    public void testGetAllUphillPIPsReversed(String deviceName, String endNodeName, String reversedPIPString) {
+        Device d = Device.getDevice(deviceName);
+        Node endNode = d.getNode(endNodeName);
+        for (PIP pip : endNode.getAllUphillPIPs()) {
+            if (pip.toString().equals(reversedPIPString)) {
+                Assertions.assertTrue(pip.isReversed());
+            } else {
+                Assertions.assertFalse(pip.isReversed());
+            }
+        }
+    }
 }
 

test/src/com/xilinx/rapidwright/device/TestPIP.java

@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2022, Xilinx, Inc.
- * Copyright (c) 2022, Advanced Micro Devices, Inc.
+ * Copyright (c) 2022, 2024, Advanced Micro Devices, Inc.
  * All rights reserved.
  *
  * Author: Chris Lavin, Xilinx Research Labs.
@@ -25,6 +25,7 @@
 
 import org.junit.jupiter.api.Assertions;
 import org.junit.jupiter.params.ParameterizedTest;
+import org.junit.jupiter.params.provider.CsvSource;
 import org.junit.jupiter.params.provider.ValueSource;
 
 public class TestPIP {
@@ -47,4 +48,17 @@ public void testGetArbitraryPIP(String deviceName) {
             }
         }
     }
+
+    @ParameterizedTest
+    @CsvSource({
+            "xcvu3p,INT_X0Y0/BYPASS_W14,INT_X0Y0/INT_NODE_IMUX_50_INT_OUT0,true",
+            "xcvu3p,INT_X9Y9/INT_NODE_IMUX_50_INT_OUT0,INT_X9Y9/BYPASS_W14,false"
+    })
+    public void testGetArbitraryPIPReversed(String deviceName, String startNodeName, String endNodeName, boolean isReversed) {
+        Device d = Device.getDevice(deviceName);
+        Node startNode = d.getNode(startNodeName);
+        Node endNode = d.getNode(endNodeName);
+        PIP pip = PIP.getArbitraryPIP(startNode, endNode);
+        Assertions.assertEquals(isReversed, pip.isReversed());
+    }
 }