#374 initial Dio Arch driver

examples/hisio_example/inc/hisio_example.h

@@ -64,12 +64,40 @@
 /*==================[inclusions]=============================================*/
 
 /*==================[macros]=================================================*/
+#define lpc4337            1
+#define mk60fx512vlq15     2
 
 /*==================[typedef]================================================*/
 
 /*==================[external data declaration]==============================*/
 
 /*==================[external functions declaration]=========================*/
+#if (CPU == mk60fx512vlq15)
+/* Reset_Handler is defined in startup_MK60F15.S_CPP */
+void Reset_Handler( void );
+
+extern uint32_t __StackTop;
+#elif (CPU == lpc4337)
+/** \brief Reset ISR
+ **
+ ** ResetISR is defined in cr_startup_lpc43xx.c
+ **
+ ** \remark the definition is in
+ **         externals/drivers/cortexM4/lpc43xx/src/cr_startup_lpc43xx.c
+ **/
+extern void ResetISR(void);
+
+/** \brief Stack Top address
+ **
+ ** External declaration for the pointer to the stack top from the Linker Script
+ **
+ ** \remark only a declaration is needed, there is no definition, the address
+ **         is set in the linker script:
+ **         externals/base/cortexM4/lpc43xx/linker/ciaa_lpc4337.ld.
+ **/
+extern void _vStackTop(void);
+#else
+#endif
 
 /** @} doxygen end group definition */
 /** @} doxygen end group definition */

examples/hisio_example/mak/Makefile

@@ -46,4 +46,5 @@ SRC_FILES            += $(wildcard $($(PROJECT_NAME)_SRC_PATH)$(DS)*.c)
 # configuration for Drivers
 OIL_FILES            += $(PROJECT_PATH)$(DS)etc$(DS)$(PROJECT_NAME).oil
 # Modules needed for this example
-MODS ?= modules$(DS)hisio
+MODS                 += modules$(DS)hisio
+MODS 						+= externals$(DS)drivers

examples/hisio_example/src/hisio_example.c

@@ -64,6 +64,14 @@
 #include "IODriver.h"         /* <= IO Driver header files */
 #include "ciaaPOSIX_stdint.h" /* <= DataTypes */
 
+#ifndef CPU
+#error CPU shall be defined
+#endif
+#if (lpc4337 == CPU)
+#include "chip.h"
+#elif (mk60fx512vlq15 == CPU)
+#else
+#endif
 /*==================[macros and definitions]=================================*/
 
 /*==================[internal data declaration]==============================*/
@@ -93,7 +101,7 @@ int main(void)
 
    /* Initialize the Dio Driver. The name MyDioConfig is the
     * one given in the DIL Configuration File */
-   Dio_InitSync(&MyDioConfig);
+   Dio_InitSync(0);
 
    /* to perform a while 1 is NEVER recomended, but in this case to perform a
     * really simple example we used anyway. :( */

modules/hisio/gen/helpers/cortexM4/lpc43xx/lpc4337/hisio.php

@@ -45,7 +45,10 @@
 
 class Hisio extends Hisio_Base {
 
-   init() {
+   function __construct() {
+      print "Y_constructor_finished\n" ;
+   } 
+   function init() {
       $dio_pins = array (
          /* port GPIO0 */
          "GPIO0[0]" => "P0_0",
@@ -102,7 +105,7 @@ class Hisio extends Hisio_Base {
             "P1_18",
             "P2_10",
             "P1_20"
-         )
+         ),
          "GPIO1" => array (
             "P1_7",
             "P1_8",
@@ -145,17 +148,20 @@ class Hisio extends Hisio_Base {
             "PF_8",  #UCLK
             "PF_9",  #DIR
             "PF_10", #TXD
-            "PF_11", #RXD)
+            "PF_11"  #RXD
+         ),
+         "U1" => array (
+            "Algo",  #Algo...
          )
       );
 
-
       $adc_ports = array (
          "ADC0_1" => "P4_1",
          "ADC0_0" => "P4_3",
          "ADC0_4" => "P7_4",
          "ADC0_3" => "P7_5",
-      )
+      );
+
       $this->addAdc($adc_ports);
    }
 

modules/hisio/gen/inc/Dio_Cfg.h.php

@@ -71,6 +71,12 @@
 #endif
 
 /*==================[macros]=================================================*/
+#define DIO_CONFIG_PIN_DIRECTION_UNUSED                   0x00000001UL
+#define DIO_CONFIG_PIN_DIRECTION_INPUT                    0x00000002UL
+#define DIO_CONFIG_PIN_DIRECTION_OUTPUT_INIT_LOW          0x00000004UL
+#define DIO_CONFIG_PIN_DIRECTION_OUTPUT_INIT_HIGH         0x00000008UL
+#define DIO_CONFIG_PIN_INVERTED                           0x00000010UL
+
 <?php
 $dios = $config->getList("/DIL", "DIO");
 foreach ($dios as $count=>$dio) {
@@ -85,8 +91,6 @@
  **
  **/
 <?php
-   print "/* #define $dio  (*(uint8_t*)0) */\n";
-
    $pins = $config->getList("/DIL/" . $dio, "PIN");
 
    foreach($pins as $count=>$pin) {
@@ -129,7 +133,7 @@
 <?php
 foreach ($dios as $count=>$dio) {
    print "/** \brief Configration of Dio Driver: " . $dio . " */\n";
-   print "extern const Dio_ConfigType " . $dio . ";\n";
+   print "extern const Dio_ConfigType Dio_Config;\n";
 }
 ?>
 

modules/hisio/gen/src/Dio_Cfg.c.php

@@ -81,13 +81,38 @@
    }
    $pins = $config->getList("/DIL/" . $dio, "PIN");
 
-   print "const Dio_ConfigType " . $dio . " = {\n";
+   print "const Dio_ConfigType Dio_Config = {\n";
    print "{\n";
    foreach($pins as $count=>$pin) {
       $pin_port = $config->getValue("/DIL/" . $dio . "/" . $pin, "PORT");
       $pin_pin = $config->getValue("/DIL/" . $dio . "/" . $pin, "PIN");
+      $pin_direction = $config->getValue("/DIL/" . $dio . "/" . $pin, "DIRECTION");
+      switch ($pin_direction)
+      {
+         case "OUTPUT_INIT_LOW":
+            $pin_flags = "DIO_CONFIG_PIN_DIRECTION_OUTPUT_INIT_LOW";
+            break;
+         case "OUTPUT_INIT_HIGH":
+            $pin_flags = "DIO_CONFIG_PIN_DIRECTION_OUTPUT_INIT_HIGH";
+            break;
+         default:
+           $this->log->error("The pin $pin hasn't a defined direction!");
+            break;
+      }
+      $pin_inverted = $config->getValue("/DIL/" . $dio . "/" . $pin, "INVERTED");
+      switch ($pin_inverted)
+      {
+         case "TRUE":
+            $pin_flags = $pin_flags . " | DIO_CONFIG_PIN_INVERTED";
+            break;
+         case "FALSE":
+            break;
+         default:
+            $this->log->error("The pin $pin hasn't a defined 'inverted' configuration!");
+            break;
+      }      
       print "/** \brief Port: " . $pin_port . " Pin: " . $pin_pin . " called " . $pin . " */\n";
-      print "{" . $pin_port . "," . $pin_pin . "," . "0" . "},\n";
+      print "{" . $pin_port . "," . $pin_pin . "," . $pin_flags . "},\n";
    }
    print "}\n";
    print ", 0 /* foo var */\n";   

modules/hisio/inc/cortexM4/lpc43xx/lpc4337/Dio_Arch.h

@@ -75,6 +75,9 @@ extern "C" {
 /*==================[external data declaration]==============================*/
 
 /*==================[external functions declaration]=========================*/
+/** \brief
+ **/
+extern IO_ErrorType Dio_InitSync_Arch(void * address);
 
 /*==================[cplusplus]==============================================*/
 #ifdef __cplusplus

modules/hisio/mak/Makefile

@@ -48,11 +48,11 @@ hisio_INC_PATH 	= $(hisio_PATH)$(DS)inc
                     $(GEN_DIR)$(DS)inc
 
 # library source files
-hisio_SRC_FILES 	= $(wildcard $(hisio_SRC_PATH)$(DS)*.c)
-hisio_SRC_FILES  += $(wildcard $(hisio_PATH)$(DS)$(ARCH)$(DS)src$(DS)*.c)
-hisio_SRC_FILES  += $(wildcard $(hisio_PATH)$(DS)$(ARCH)$(DS)$(CPUTYPE)$(DS)src$(DS)*.c)
-hisio_SRC_FILES  += $(wildcard $(hisio_PATH)$(DS)$(ARCH)$(DS)$(CPUTYPE)$(DS)$(CPU)$(DS)src$(DS)*.c)
-hisio_SRC_FILES  += $(wildcard $(GEN_DIR)$(DS)src$(DS)*.c)
+hisio_SRC_FILES 	= $(wildcard $(hisio_SRC_PATH)$(DS)*.c)                            \
+                    $(wildcard $(hisio_SRC_PATH)$(DS)$(ARCH)$(DS)*.c)                \
+                    $(wildcard $(hisio_SRC_PATH)$(DS)$(ARCH)$(DS)$(CPUTYPE)$(DS)*.c) \
+                    $(wildcard $(hisio_SRC_PATH)$(DS)$(ARCH)$(DS)$(CPUTYPE)$(DS)$(CPU)$(DS)*.c)  \
+                    $(wildcard $(GEN_DIR)$(DS)src$(DS)*.c)
 
 # files to be generated
 # TODO see https://github.com/ciaa/Firmware/issues/277

modules/hisio/src/Dio.c

@@ -72,7 +72,10 @@
 /*==================[external functions definition]==========================*/
 extern IO_ErrorType Dio_InitSync(void * address)
 {
-   return IO_E_OK;
+   IO_ErrorType ret;
+
+   ret = Dio_InitSync_Arch(address);
+   return ret;
 }
 
 extern IO_ValueType Dio_GetSync(IO_ChannelType channel)

modules/hisio/src/cortexM4/lpc43xx/lpc4337/Dio_Arch.c

@@ -0,0 +1,124 @@
+/* Copyright 2015, Mariano Cerdeiro
+ * Copyright 2016, Juan Cecconi
+ * All rights reserved.
+ *
+ * This file is part of CIAA Firmware.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/** \brief IO DIO Driver Arch source file
+ **
+ ** This file contains is the Dio driver Arch
+ **
+ **/
+
+/** \addtogroup CIAA_Firmware CIAA Firmware
+ ** @{ */
+/** \addtogroup HISIO HisIO Module
+ ** @{ */
+
+/*
+ * Initials     Name
+ * ---------------------------
+ * MaCe         Mariano Cerdeiro
+ * JuCe         Juan Cecconi 
+ */
+
+/*
+ * modification history (new versions first)
+ * -----------------------------------------------------------
+ * 20160111 v0.0.1 JuCe initial version
+ */
+
+/*==================[inclusions]=============================================*/
+#include "IODriver_Base.h"
+/*==================[macros and definitions]=================================*/
+
+/*==================[internal data declaration]==============================*/
+
+/*==================[internal functions declaration]=========================*/
+
+/*==================[internal data definition]===============================*/
+
+/*==================[external data definition]===============================*/
+
+/*==================[internal functions definition]==========================*/
+
+/*==================[external functions definition]==========================*/
+extern IO_ErrorType Dio_InitSync_Arch(void * address)
+{
+   uint16_t i;
+
+   for(i=0 ; i < DIO_PINS_COUNT ; i++)
+   {
+      if(Dio_Config.Pins[i].Flags & DIO_CONFIG_PIN_DIRECTION_INPUT)
+      {
+         Chip_SCU_PinMux(Dio_Config.Pins[i].Port, Dio_Config.Pins[i].Pin, SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS, FUNC0);
+         //Chip_GPIO_SetDir( LPC_GPIO_PORT, gpioPort, ( 1 << gpioPin ), INPUT );
+      }
+      else if(Dio_Config.Pins[i].Flags & DIO_CONFIG_PIN_DIRECTION_OUTPUT_INIT_LOW)
+      {
+         Chip_SCU_PinMux(Dio_Config.Pins[i].Port, Dio_Config.Pins[i].Pin, SCU_MODE_INACT | SCU_MODE_ZIF_DIS, FUNC0);
+         //Chip_GPIO_SetDir( LPC_GPIO_PORT, gpioPort, ( 1 << gpioPin ), OUTPUT );
+         //Chip_GPIO_ClearValue(LPC_GPIO_PORT, gpioPort, ( 1 << gpioPin ));
+      }
+
+   }
+   return IO_E_OK;
+}
+
+extern IO_ValueType Dio_GetSync_Arch(IO_ChannelType channel)
+{
+   return IO_HIGH;
+}
+
+extern void Dio_SetSync_Arch(IO_ChannelType channel, IO_ValueType value)
+{
+
+}
+
+extern IO_ValueType Dio_GetPortSync_Arch(IO_ChannelType channel)
+{
+   return 0xFF;
+}
+
+extern void Dio_SetPortSync_Arch(IO_ChannelType channel, IO_ValueType value)
+{
+
+}
+
+extern void Dio_SetPortMaskedSync_Arch(IO_ChannelType channel, IO_ValueType value, IO_ValueType mask)
+{
+
+}
+
+/** @} doxygen end group definition */
+/** @} doxygen end group definition */
+/*==================[end of file]============================================*/
+