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More floating point fixes
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Down to 752 failing tests
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dingusdev committed Oct 27, 2024
1 parent 873f863 commit 5f826d6
Showing 1 changed file with 44 additions and 31 deletions.
75 changes: 44 additions & 31 deletions cpu/ppc/ppcfpopcodes.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -237,11 +237,11 @@ void dppc_interpreter::ppc_fdiv() {
snan_double_check(reg_a, reg_b);

double ppc_dblresult64_d = val_reg_a / val_reg_b;

if (val_reg_b == 0.0) {
ppc_state.fpscr |= FX + VX;
ppc_state.fpscr |= 0xa0000000;
ppc_dblresult64_d = -ppc_dblresult64_d;
}
ppc_store_dfpresult_flt(reg_d, ppc_dblresult64_d);
fpresult_update(ppc_dblresult64_d);

if (std::isinf(val_reg_a) && std::isinf(val_reg_b)) {
ppc_state.fpscr |= VXIDI;
Expand All @@ -254,6 +254,9 @@ void dppc_interpreter::ppc_fdiv() {
}
}

ppc_store_dfpresult_flt(reg_d, ppc_dblresult64_d);
fpresult_update(ppc_dblresult64_d);

if (rec)
ppc_update_cr1();
}
Expand All @@ -268,8 +271,6 @@ void dppc_interpreter::ppc_fmul() {
snan_double_check(reg_a, reg_c);

double ppc_dblresult64_d = val_reg_a * val_reg_c;
ppc_store_dfpresult_flt(reg_d, ppc_dblresult64_d);
fpresult_update(ppc_dblresult64_d);

if ((std::isinf(val_reg_a) && (val_reg_c == 0.0)) ||
(std::isinf(val_reg_c) && (val_reg_a == 0.0))) {
Expand All @@ -279,6 +280,10 @@ void dppc_interpreter::ppc_fmul() {
}
}

ppc_store_dfpresult_flt(reg_d, ppc_dblresult64_d);
fpresult_update(ppc_dblresult64_d);


if (rec)
ppc_update_cr1();
}
Expand All @@ -294,8 +299,6 @@ void dppc_interpreter::ppc_fmadd() {
snan_single_check(reg_b);

double ppc_dblresult64_d = std::fma(val_reg_a, val_reg_c, val_reg_b);
ppc_store_dfpresult_flt(reg_d, ppc_dblresult64_d);
fpresult_update(ppc_dblresult64_d);

double inf = std::numeric_limits<double>::infinity();
if (((val_reg_a == inf) && (val_reg_b == -inf)) || ((val_reg_a == -inf) && (val_reg_b == inf)))
Expand All @@ -309,6 +312,10 @@ void dppc_interpreter::ppc_fmadd() {
}
}

ppc_store_dfpresult_flt(reg_d, ppc_dblresult64_d);
fpresult_update(ppc_dblresult64_d);


if (rec)
ppc_update_cr1();
}
Expand All @@ -324,27 +331,26 @@ void dppc_interpreter::ppc_fmsub() {
snan_single_check(reg_b);

double ppc_dblresult64_d = std::fma(val_reg_a, val_reg_c, -val_reg_b);
ppc_store_dfpresult_flt(reg_d, ppc_dblresult64_d);
fpresult_update(ppc_dblresult64_d);

if ((std::isinf(val_reg_a) && (val_reg_c == 0.0)) ||
(std::isinf(val_reg_c) && (val_reg_a == 0.0))) {
ppc_state.fpscr |= VXIMZ;
if (std::isnan(ppc_dblresult64_d)) {
ppc_dblresult64_d = set_endresult_nan(ppc_dblresult64_d);
}

}

double inf = std::numeric_limits<double>::infinity();
if (((val_reg_a == inf) && (val_reg_b == -inf)) || \
((val_reg_a == -inf) && (val_reg_b == inf))) {
if (((val_reg_a == inf) && (val_reg_b == -inf)) || ((val_reg_a == -inf) && (val_reg_b == inf))) {
ppc_state.fpscr |= VXISI;
if (std::isnan(ppc_dblresult64_d)) {
ppc_dblresult64_d = set_endresult_nan(ppc_dblresult64_d);
}
}

ppc_store_dfpresult_flt(reg_d, ppc_dblresult64_d);
fpresult_update(ppc_dblresult64_d);

if (rec)
ppc_update_cr1();
}
Expand All @@ -360,15 +366,13 @@ void dppc_interpreter::ppc_fnmadd() {
snan_single_check(reg_b);

double ppc_dblresult64_d = -std::fma(val_reg_a, val_reg_c, val_reg_b);

if (std::isnan(ppc_dblresult64_d)) {
ppc_dblresult64_d = std::numeric_limits<double>::quiet_NaN();
}
ppc_store_dfpresult_flt(reg_d, ppc_dblresult64_d);
fpresult_update(ppc_dblresult64_d);

double inf = std::numeric_limits<double>::infinity();
if (((val_reg_a == inf) && (val_reg_b == -inf)) || \
((val_reg_a == -inf) && (val_reg_b == inf))) {
if (((val_reg_a == inf) && (val_reg_b == -inf)) || ((val_reg_a == -inf) && (val_reg_b == inf))) {
ppc_state.fpscr |= VXISI;
if (std::isnan(ppc_dblresult64_d)) {
ppc_dblresult64_d = set_endresult_nan(ppc_dblresult64_d);
Expand All @@ -383,6 +387,10 @@ void dppc_interpreter::ppc_fnmadd() {
}
}

ppc_store_dfpresult_flt(reg_d, ppc_dblresult64_d);
fpresult_update(ppc_dblresult64_d);


if (rec)
ppc_update_cr1();
}
Expand All @@ -398,10 +406,8 @@ void dppc_interpreter::ppc_fnmsub() {
snan_single_check(reg_b);

double ppc_dblresult64_d = -std::fma(val_reg_a, val_reg_c, -val_reg_b);
ppc_store_dfpresult_flt(reg_d, ppc_dblresult64_d);
fpresult_update(ppc_dblresult64_d);

if ((std::isinf(val_reg_a) && (val_reg_c == 0.0)) || \
if ((std::isinf(val_reg_a) && (val_reg_c == 0.0)) ||
(std::isinf(val_reg_c) && (val_reg_a == 0.0))) {
ppc_state.fpscr |= VXIMZ;
if (std::isnan(ppc_dblresult64_d)) {
Expand All @@ -410,14 +416,16 @@ void dppc_interpreter::ppc_fnmsub() {
}

double inf = std::numeric_limits<double>::infinity();
if (((val_reg_a == inf) && (val_reg_b == -inf)) || \
((val_reg_a == -inf) && (val_reg_b == inf))) {
if (((val_reg_a == inf) && (val_reg_b == -inf)) || ((val_reg_a == -inf) && (val_reg_b == inf))) {
ppc_state.fpscr |= VXISI;
if (std::isnan(ppc_dblresult64_d)) {
ppc_dblresult64_d = set_endresult_nan(ppc_dblresult64_d);
}
}

ppc_store_dfpresult_flt(reg_d, ppc_dblresult64_d);
fpresult_update(ppc_dblresult64_d);

if (rec)
ppc_update_cr1();
}
Expand All @@ -432,7 +440,6 @@ void dppc_interpreter::ppc_fadds() {
snan_double_check(reg_a, reg_b);

double ppc_dblresult64_d = (float)(val_reg_a + val_reg_b);
ppc_store_sfpresult_flt(reg_d, ppc_dblresult64_d);

double inf = std::numeric_limits<double>::infinity();
if (((val_reg_a == inf) && (val_reg_b == -inf)) || ((val_reg_a == -inf) && (val_reg_b == inf))) {
Expand All @@ -442,6 +449,7 @@ void dppc_interpreter::ppc_fadds() {
}
}

ppc_store_sfpresult_flt(reg_d, ppc_dblresult64_d);
fpresult_update(ppc_dblresult64_d);

if (rec)
Expand Down Expand Up @@ -489,7 +497,8 @@ void dppc_interpreter::ppc_fdivs() {

double ppc_dblresult64_d = (float)(val_reg_a / val_reg_b);
if (val_reg_b == 0.0) {
ppc_state.fpscr |= FX + VX;
ppc_state.fpscr |= 0xa0000000;
ppc_dblresult64_d = -ppc_dblresult64_d;
}

if (std::isinf(val_reg_a) && std::isinf(val_reg_b)) {
Expand Down Expand Up @@ -548,8 +557,6 @@ void dppc_interpreter::ppc_fmadds() {
snan_single_check(reg_b);

double ppc_dblresult64_d = (float)std::fma(val_reg_a, val_reg_c, val_reg_b);
ppc_store_sfpresult_flt(reg_d, ppc_dblresult64_d);
fpresult_update(ppc_dblresult64_d);

double inf = std::numeric_limits<double>::infinity();
if (((val_reg_a == inf) && (val_reg_b == -inf)) || ((val_reg_a == -inf) && (val_reg_b == inf)))
Expand All @@ -567,6 +574,9 @@ void dppc_interpreter::ppc_fmadds() {
ppc_dblresult64_d = std::numeric_limits<double>::quiet_NaN();
}

ppc_store_sfpresult_flt(reg_d, ppc_dblresult64_d);
fpresult_update(ppc_dblresult64_d);

if (rec)
ppc_update_cr1();
}
Expand All @@ -586,8 +596,6 @@ void dppc_interpreter::ppc_fmsubs() {
if (std::isnan(ppc_dblresult64_d)) {
ppc_dblresult64_d = std::numeric_limits<double>::quiet_NaN();
}
ppc_store_sfpresult_flt(reg_d, ppc_dblresult64_d);
fpresult_update(ppc_dblresult64_d);

if ((std::isinf(val_reg_a) && (val_reg_c == 0.0)) ||
(std::isinf(val_reg_c) && (val_reg_a == 0.0))) {
Expand All @@ -601,6 +609,9 @@ void dppc_interpreter::ppc_fmsubs() {
if ((val_reg_a == inf) && (val_reg_b == inf))
ppc_state.fpscr |= VXISI;

ppc_store_sfpresult_flt(reg_d, ppc_dblresult64_d);
fpresult_update(ppc_dblresult64_d);

if (rec)
ppc_update_cr1();
}
Expand All @@ -619,8 +630,6 @@ void dppc_interpreter::ppc_fnmadds() {
if (std::isnan(ppc_dblresult64_d)) {
ppc_dblresult64_d = std::numeric_limits<double>::quiet_NaN();
}
ppc_store_sfpresult_flt(reg_d, ppc_dblresult64_d);
fpresult_update(ppc_dblresult64_d);

double inf = std::numeric_limits<double>::infinity();
if (((val_reg_a == inf) && (val_reg_b == -inf)) || ((val_reg_a == -inf) && (val_reg_b == inf)))
Expand All @@ -634,6 +643,9 @@ void dppc_interpreter::ppc_fnmadds() {
}
}

ppc_store_sfpresult_flt(reg_d, ppc_dblresult64_d);
fpresult_update(ppc_dblresult64_d);

if (rec)
ppc_update_cr1();
}
Expand All @@ -649,8 +661,6 @@ void dppc_interpreter::ppc_fnmsubs() {
snan_single_check(reg_b);

double ppc_dblresult64_d = -(float)std::fma(val_reg_a, val_reg_c, -val_reg_b);
ppc_store_sfpresult_flt(reg_d, ppc_dblresult64_d);
fpresult_update(ppc_dblresult64_d);

if ((std::isinf(val_reg_a) && (val_reg_c == 0.0)) ||
(std::isinf(val_reg_c) && (val_reg_a == 0.0))) {
Expand All @@ -664,6 +674,9 @@ void dppc_interpreter::ppc_fnmsubs() {
if ((val_reg_a == inf) && (val_reg_b == inf))
ppc_state.fpscr |= VXISI;

ppc_store_sfpresult_flt(reg_d, ppc_dblresult64_d);
fpresult_update(ppc_dblresult64_d);

if (rec)
ppc_update_cr1();
}
Expand Down

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