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liteeth/gen: Allow configuration of nrxslots and ntxslots
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We might want to increase nrxslots and ntxslots to improve
performance, so allow it to be overriden via the yaml config.
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antonblanchard committed Aug 5, 2021
1 parent 947ed03 commit 7ac3fe6
Showing 1 changed file with 8 additions and 2 deletions.
10 changes: 8 additions & 2 deletions liteeth/gen.py
Original file line number Diff line number Diff line change
Expand Up @@ -213,14 +213,20 @@ def __init__(self, platform, core_config):
# PHY --------------------------------------------------------------------------------------
PHYCore.__init__(self, platform, core_config)

nrxslots = core_config.get("nrxslots", 2)
ntxslots = core_config.get("ntxslots", 2)
mac_memsize = (nrxslots + ntxslots) * buffer_depth

# MAC --------------------------------------------------------------------------------------
self.submodules.ethmac = LiteEthMAC(
phy = self.ethphy,
dw = 32,
interface = "wishbone",
endianness = core_config["endianness"])
endianness = core_config["endianness"],
nrxslots = nrxslots,
ntxslots = ntxslots)
self.add_wb_slave(self.mem_map["ethmac"], self.ethmac.bus)
self.add_memory_region("ethmac", self.mem_map["ethmac"], 0x2000, type="io")
self.add_memory_region("ethmac", self.mem_map["ethmac"], mac_memsize, type="io")
self.add_csr("ethmac")

# Wishbone Interface -----------------------------------------------------------------------
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