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bus::write is only returning bool now, no wrapping struct
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@folkertvanheusden
folkertvanheusden committed Jun 24, 2024
1 parent ddf9080 commit 8294b58
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Showing 3 changed files with 44 additions and 44 deletions.
64 changes: 32 additions & 32 deletions bus.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -545,7 +545,7 @@ bool bus::is_psw(const uint16_t addr, const int run_mode, const d_i_space_t spac
return false;
}

write_rc_t bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint16_t value, const rm_selection_t mode_selection, const d_i_space_t space)
bool bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint16_t value, const rm_selection_t mode_selection, const d_i_space_t space)
{
int run_mode = mode_selection == rm_cur ? c->getPSW_runmode() : c->getPSW_prev_runmode();

Expand Down Expand Up @@ -577,7 +577,7 @@ write_rc_t bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint1

c->setPSW(vtemp, false);

return { true };
return true;
}

if (a == ADDR_STACKLIM || a == ADDR_STACKLIM + 1) { // stack limit register
Expand All @@ -591,15 +591,15 @@ write_rc_t bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint1

c->setStackLimitRegister(v);

return { false };
return false;
}

if (a == ADDR_MICROPROG_BREAK_REG || a == ADDR_MICROPROG_BREAK_REG + 1) { // microprogram break register
TRACE("WRITE-I/O micropram break register %s: %03o", a & 1 ? "MSB" : "LSB", value);

update_word(&microprogram_break_register, a & 1, value);

return { false };
return false;
}

if (a == ADDR_MMR0 || a == ADDR_MMR0 + 1) { // MMR0
Expand All @@ -609,7 +609,7 @@ write_rc_t bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint1
update_word(&temp, a & 1, value);
mmu_->setMMR0(temp);

return { false };
return false;
}
}
else {
Expand All @@ -622,65 +622,65 @@ write_rc_t bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint1
if (a == ADDR_STACKLIM) { // stack limit register
TRACE("WRITE-I/O stack limit register: %06o", value);
c->setStackLimitRegister(value & 0xff00);
return { false };
return false;
}

if (a >= ADDR_KERNEL_R && a <= ADDR_KERNEL_R + 5) { // kernel R0-R5
int reg = a - ADDR_KERNEL_R;
TRACE("WRITE-I/O kernel R%d: %06o", reg, value);
c->set_register(reg, value);
return { false };
return false;
}
if (a >= ADDR_USER_R && a <= ADDR_USER_R + 5) { // user R0-R5
int reg = a - ADDR_USER_R;
TRACE("WRITE-I/O user R%d: %06o", reg, value);
c->set_register(reg, value);
return { false };
return false;
}
if (a == ADDR_KERNEL_SP) { // kernel SP
TRACE("WRITE-I/O kernel SP: %06o", value);
c->setStackPointer(0, value);
return { false };
return false;
}
if (a == ADDR_PC) { // PC
TRACE("WRITE-I/O PC: %06o", value);
c->setPC(value);
return { false };
return false;
}
if (a == ADDR_SV_SP) { // supervisor SP
TRACE("WRITE-I/O supervisor sp: %06o", value);
c->setStackPointer(1, value);
return { false };
return false;
}
if (a == ADDR_USER_SP) { // user SP
TRACE("WRITE-I/O user sp: %06o", value);
c->setStackPointer(3, value);
return { false };
return false;
}

if (a == ADDR_MICROPROG_BREAK_REG) { // microprogram break register
TRACE("WRITE-I/O microprogram break register: %06o", value);
microprogram_break_register = value & 0xff; // only 8b on 11/70?
return { false };
return false;
}
}

if (a == ADDR_CPU_ERR) { // cpu error register
TRACE("WRITE-I/O CPUERR: %06o", value);
mmu_->setCPUERR(0);
return { false };
return false;
}

if (a == ADDR_MMR3) { // MMR3
TRACE("WRITE-I/O set MMR3: %06o", value);
mmu_->setMMR3(value);
return { false };
return false;
}

if (a == ADDR_MMR0) { // MMR0
TRACE("WRITE-I/O set MMR0: %06o", value);
mmu_->setMMR0(value);
return { false };
return false;
}

if (a == ADDR_PIR) { // PIR
Expand All @@ -697,52 +697,52 @@ write_rc_t bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint1

mmu_->setPIR(value);

return { false };
return false;
}

if (a == ADDR_LFC) { // line frequency clock and status register
kw11_l_->write_word(a, value);

return { false };
return false;
}

if (tm11 && a >= TM_11_BASE && a < TM_11_END) {
TRACE("WRITE-I/O TM11 register %d: %06o", (a - TM_11_BASE) / 2, value);
word_mode == wm_byte ? tm11->write_byte(a, value) : tm11->write_word(a, value);
return { false };
return false;
}

if (rk05_ && a >= RK05_BASE && a < RK05_END) {
TRACE("WRITE-I/O RK05 register %d: %06o", (a - RK05_BASE) / 2, value);
word_mode == wm_byte ? rk05_->write_byte(a, value) : rk05_->write_word(a, value);
return { false };
return false;
}

if (rl02_ && a >= RL02_BASE && a < RL02_END) {
TRACE("WRITE-I/O RL02 register %d: %06o", (a - RL02_BASE) / 2, value);
word_mode == wm_byte ? rl02_->write_byte(a, value) : rl02_->write_word(a, value);
return { false };
return false;
}

if (tty_ && a >= PDP11TTY_BASE && a < PDP11TTY_END) {
TRACE("WRITE-I/O TTY register %d: %06o", (a - PDP11TTY_BASE) / 2, value);
word_mode == wm_byte ? tty_->write_byte(a, value) : tty_->write_word(a, value);
return { false };
return false;
}

if (dc11_ && a >= DC11_BASE && a < DC11_END) {
word_mode == wm_byte ? dc11_->write_byte(a, value) : dc11_->write_word(a, value);
return { false };
return false;
}

if (rp06_ && a >= RP06_BASE && a < RP06_END) {
word_mode == wm_byte ? rp06_->write_byte(a, value) : rp06_->write_word(a, value);
return { false };
return false;
}

if (a >= 0172100 && a <= 0172137) { // MM11-LP parity
TRACE("WRITE-I/O MM11-LP parity (%06o): %o", a, value);
return { false };
return false;
}

/// MMU ///
Expand All @@ -754,31 +754,31 @@ write_rc_t bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint1
else
mmu_->write_byte(a, value);

return { false };
return false;
}
///////////

if (a >= 0177740 && a <= 0177753) { // cache control register and others
// TODO
return { false };
return false;
}

if (a >= 0170200 && a <= 0170377) { // unibus map
TRACE("writing %06o to unibus map (%06o)", value, a);
// TODO
return { false };
return false;
}

if (a == ADDR_CONSW) { // switch register
console_leds = value;
return { false };
return false;
}

if (a == ADDR_SYSSIZE || a == ADDR_SYSSIZE + 2) // system size (is read-only)
return { false };
return false;

if (a == ADDR_SYSTEM_ID) // is r/o
return { false };
return false;

///////////

Expand Down Expand Up @@ -817,7 +817,7 @@ write_rc_t bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint1
else
m->write_word(m_offset, value);

return { false };
return false;
}

void bus::write_physical(const uint32_t a, const uint16_t value)
Expand Down
2 changes: 1 addition & 1 deletion bus.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -130,7 +130,7 @@ class bus: public device
uint8_t read_unibus_byte(const uint32_t a);
uint16_t read_physical(const uint32_t a);

write_rc_t write(const uint16_t a, const word_mode_t word_mode, uint16_t value, const rm_selection_t mode_selection, const d_i_space_t s = i_space);
bool write(const uint16_t a, const word_mode_t word_mode, uint16_t value, const rm_selection_t mode_selection, const d_i_space_t s = i_space);
void write_unibus_byte(const uint32_t a, const uint8_t value);
void write_byte(const uint16_t a, const uint8_t value) override { write(a, wm_byte, value, rm_cur); }
void write_word(const uint16_t a, const uint16_t value, const d_i_space_t s);
Expand Down
22 changes: 11 additions & 11 deletions cpu.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -199,7 +199,7 @@ bool cpu::put_result(const gam_rc_t & g, const uint16_t value)
return true;
}

return b->write(g.addr.value(), g.word_mode, value, g.mode_selection, g.space).is_psw == false;
return b->write(g.addr.value(), g.word_mode, value, g.mode_selection, g.space) == false;
}

uint16_t cpu::add_register(const int nr, const uint16_t value)
Expand Down Expand Up @@ -548,7 +548,7 @@ bool cpu::putGAM(const gam_rc_t & g, const uint16_t value)
if (g.addr.has_value()) {
auto rc = b->write(g.addr.value(), g.word_mode, value, g.mode_selection, g.space);

return rc.is_psw == false;
return rc == false;
}

if (g.mode_selection == rm_prev) {
Expand Down Expand Up @@ -1078,7 +1078,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
addToMMR1(a);
int32_t vl = (a.value.value() + 1) & (word_mode == wm_byte ? 0xff : 0xffff);

bool set_flags = b->write(a.addr.value(), a.word_mode, vl, a.mode_selection, a.space).is_psw == false;
bool set_flags = b->write(a.addr.value(), a.word_mode, vl, a.mode_selection, a.space) == false;

if (set_flags) {
setPSW_n(SIGN(vl, word_mode));
Expand Down Expand Up @@ -1110,7 +1110,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
addToMMR1(a);
int32_t vl = (a.value.value() - 1) & (word_mode == wm_byte ? 0xff : 0xffff);

bool set_flags = b->write(a.addr.value(), a.word_mode, vl, a.mode_selection, a.space).is_psw == false;
bool set_flags = b->write(a.addr.value(), a.word_mode, vl, a.mode_selection, a.space) == false;

if (set_flags) {
setPSW_n(SIGN(vl, word_mode));
Expand Down Expand Up @@ -1142,7 +1142,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
addToMMR1(a);
uint16_t v = -a.value.value();

bool set_flags = b->write(a.addr.value(), a.word_mode, v, a.mode_selection, a.space).is_psw == false;
bool set_flags = b->write(a.addr.value(), a.word_mode, v, a.mode_selection, a.space) == false;

if (set_flags) {
setPSW_n(SIGN(v, word_mode));
Expand Down Expand Up @@ -1179,7 +1179,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
bool org_c = getPSW_c();
uint16_t v = (vo + org_c) & (word_mode == wm_byte ? 0x00ff : 0xffff);

bool set_flags = b->write(a.addr.value(), a.word_mode, v, a.mode_selection, a.space).is_psw == false;
bool set_flags = b->write(a.addr.value(), a.word_mode, v, a.mode_selection, a.space) == false;

if (set_flags) {
setPSW_n(SIGN(v, word_mode));
Expand Down Expand Up @@ -1216,7 +1216,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
bool org_c = getPSW_c();
uint16_t v = (vo - org_c) & (word_mode == wm_byte ? 0xff : 0xffff);

bool set_flags = b->write(a.addr.value(), a.word_mode, v, a.mode_selection, a.space).is_psw == false;
bool set_flags = b->write(a.addr.value(), a.word_mode, v, a.mode_selection, a.space) == false;

if (set_flags) {
setPSW_n(SIGN(v, word_mode));
Expand Down Expand Up @@ -1269,7 +1269,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
else
temp = (t >> 1) | (getPSW_c() << 15);

bool set_flags = b->write(a.addr.value(), a.word_mode, temp, a.mode_selection, a.space).is_psw == false;
bool set_flags = b->write(a.addr.value(), a.word_mode, temp, a.mode_selection, a.space) == false;

if (set_flags) {
setPSW_c(new_carry);
Expand Down Expand Up @@ -1319,7 +1319,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
temp = (t << 1) | getPSW_c();
}

bool set_flags = b->write(a.addr.value(), a.word_mode, temp, a.mode_selection, a.space).is_psw == false;
bool set_flags = b->write(a.addr.value(), a.word_mode, temp, a.mode_selection, a.space) == false;

if (set_flags) {
setPSW_c(new_carry);
Expand Down Expand Up @@ -1365,7 +1365,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
v >>= 1;
v |= hb;

bool set_flags = b->write(a.addr.value(), a.word_mode, v, a.mode_selection, a.space).is_psw == false;
bool set_flags = b->write(a.addr.value(), a.word_mode, v, a.mode_selection, a.space) == false;

if (set_flags) {
setPSW_n(SIGN(v, word_mode));
Expand Down Expand Up @@ -1397,7 +1397,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
uint16_t vl = a.value.value();
uint16_t v = (vl << 1) & (word_mode == wm_byte ? 0xff : 0xffff);

bool set_flags = b->write(a.addr.value(), a.word_mode, v, a.mode_selection, a.space).is_psw == false;
bool set_flags = b->write(a.addr.value(), a.word_mode, v, a.mode_selection, a.space) == false;

if (set_flags) {
setPSW_n(SIGN(v, word_mode));
Expand Down

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