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André Wagner edited this page Jan 20, 2024 · 28 revisions

Boards

BIOS

Hardware Specification

CPU

  • Upon initialization, the CPU will start running the BIOS code at address 0x0.

Memory

  • The memory map is as follows:

image

  • The BIOS is contained between 0x0000 and 0x1fff.
  • The shared memory (between 0x2000 and 0x3fff) is accessible from any bank. This can be used for storing variables when an application spans more than one memory bank. Positions between 0x2000 and 0x23ff are reserved for the BIOS.
  • The upper memory (between 0x4000 and 0xffff) can be bankswitched in 8 different memory banks.
  • If the register RAMONLY is active, then the whole 64kB of memory can be accessed as a single RAM. This is meant primarily to be used by CP/M, but can be used for other pourposes as well. If this mode is activated, backswitching will not work.

I/O

The I/O ports are as follows:

Port Direction Description
0x00 Output Configure memory manager (bits 0~2: memory bank, bit 3: RAMONLY)
0x01 Output Write to the config register in 68B50
0x01 Input Read from the state register in 68B50
0x02 Output Transfer byte to SDCard
0x02 Input Read last byte sent by the SDCard
0x05 Output Write to the serial line (TX)
0x05 Input Read from the serial line (RX)

Bus

This is the pinout of the bus:

image

CPU, memory and debugger use all ports of the bus. Other peripherals (such as serial and storage) use only ports A, B, C and G.

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