arc: Use intrinsics for __builtin_mul_overflow () #134
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…ion."" This reverts commit 8a4f766. Signed-off-by: Luis Silva <[email protected]>
This patch covers signed and unsigned additions. The generated code would be something along these lines: signed: add.f r0, r1, r2 b.v @Label unsigned: add.f r0, r1, r2 b.c @Label gcc/ChangeLog: * config/arc/arc-modes.def: Add CC_V mode. * config/arc/predicates.md (proper_comparison_operator): Handle E_CC_Vmode. (equality_comparison_operator): Exclude CC_Vmode from eq/ne. (cc_set_register): Handle CC_Vmode. (cc_use_register): Likewise. * config/arc/arc.md (addsi3_v): New insn. (addvsi4): New expand. (addsi3_c): New insn. (uaddvsi4): New expand. * config/arc/arc-protos.h (arc_gen_unlikely_cbranch): New. * config/arc/arc.cc (arc_gen_unlikely_cbranch): New. (get_arc_condition_code): Handle E_CC_Vmode. (arc_init_reg_tables): Handle CC_Vmode. gcc/testsuite/ChangeLog: * gcc.target/arc/overflow-1.c: New. Signed-off-by: Shahab Vahedi <[email protected]>
This patch covers signed and unsigned subtractions. The generated code would be something along these lines: signed: sub.f r0, r1, r2 b.v @Label unsigned: sub.f r0, r1, r2 b.c @Label gcc/ChangeLog: * config/arc/arc.md (subsi3_v): New insn. (subvsi4): New expand. (subsi3_c): New insn. (usubvsi4): New expand. gcc/testsuite/ChangeLog: * gcc.target/arc/overflow-2.c: New. Signed-off-by: Shahab Vahedi <[email protected]>
artemiy-volkov
approved these changes
Dec 9, 2024
Due to the patch by Roger Sayle, 0988121, which introduces the use of the `rlc rX,0` instruction in place of the `mov.hs`, the add overflow test case needs to be updated. The previous test case was validating the `mov.hs` instruction, but now it must validate the `rlc` instruction as the new behavior. Signed-off-by: Luis Silva <[email protected]>
This patch introduces two new instruction patterns:
`*mulsi3_cmp0`: This pattern performs a multiplication
and sets the CC_Z register based on the result, while
also storing the result of the multiplication in a
general-purpose register.
`*mulsi3_cmp0_noout`: This pattern performs a
multiplication and sets the CC_Z register based on the
result without storing the result in a general-purpose
register.
These patterns are optimized to generate code using the `mpy.f`
instruction, specifically used where the result is compared to zero.
In addition, the previous commutative multiplication implementation
was removed. It incorrectly took into account the negative flag,
which is wrong. This new implementation only considers the zero
flag.
A test case has been added to verify the correctness of these
changes.
Signed-off-by: Luis Silva <[email protected]>
This patch handles both signed and unsigned builtin multiplication overflow. Uses the "mpy.f" instruction to set the condition codes based on the result. In the event of an overflow, the V flag is set, triggering a conditional move depending on the V flag status. For example, set "1" to "r0" in case of overflow: mov_s r0,1 mpy.f r0,r0,r1 j_s.d [blink] mov.nv r0,0 Signed-off-by: Luis Silva <[email protected]>
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These set of patches are related to the implementation of the intrinsics for __builtin_mul_overflow ().
9f95d5c - Reapplied Roger Sayle's patch which was reverted in the previous release (arc-2024.06)
1b8394b and e6f28c6 - Added Shahab's patch as he implemented the condition code for overflow flag and they have already been sent upstream.
adbac3b - Removed the faulty commutative operation for multiplication which was incorrectly using "Zero or Negative" flags and added the correct implementation using the "Z" flag.
cee5f73 - Added pattern matching for __builtin_mul_overflow().
058b4fa - Fixed Shahab's previous patch test case.