Merge pull request #53 from sparrowgrine/main

Add GD32C1xx support

.github/workflows/ci.yaml

@@ -12,6 +12,7 @@ jobs:
     strategy:
       matrix:
         crate:
+          - gd32c1
           - gd32e1
           - gd32e2
           - gd32e5

CHANGELOG.md

@@ -1,5 +1,25 @@
 # Changelog
 
+## [unreleased]
+
+- GD32C1x3
+  - Added support for GD32C103 and GD32C113 in new `gd32c1` crate.
+- GD32E103
+  - Fixed range of `I2C*.CTL1.I2CCLK` and `I2C*.RT.RISETIME`.
+  - Fixed range of `DAC.DACC_R8DH.DAC*_DH`.
+  - Fixed range of `CAN*.BT.BAUDPSC`.
+- GD32F1x0
+  - Fixed width of `I2C*.CTL1.I2CCLK` and `I2C*.RT.RISETIME` to be 7 bits rather than 6.
+  - Fixed range of `DAC.DACC_R8DH.DAC*_DH`.
+  - Fixed range of `CAN*.BT.BAUDPSC`.
+- GD32F20x
+  - Fixed range of `I2C*.CTL1.I2CCLK` and `I2C*.RT.RISETIME`.
+  - Fixed range of `DAC.DACC_R8DH.DAC*_DH`.
+  - Fixed range of `CAN*.BT.BAUDPSC`.
+- GD32F30x
+  - Fixed range of `DAC.DACC_R8DH.DAC*_DH`.
+  - Fixed range of `CAN*.BT.BAUDPSC`.
+
 ## [0.8.0]
 
 - Updated to `critical-section` to 1.1.2.

Makefile

@@ -5,7 +5,7 @@ all: patch svd2rust
 
 SHELL := /usr/bin/env bash
 
-CRATES ?= gd32e1 gd32e2 gd32e5 gd32f1 gd32f2 gd32f3
+CRATES ?= gd32e1 gd32c1 gd32e2 gd32e5 gd32f1 gd32f2 gd32f3
 
 # All yaml files in devices/ will be used to patch an SVD
 YAMLS := $(foreach crate, $(CRATES), \

devices/common_patches/gd32f1x0.yaml

@@ -121,6 +121,15 @@ TIMER15:
         name: "PECV"
       TRS:
         name: "TR"
+  CTL1:
+    _modify:
+      I2CCLK:
+        bitWidth: 7
+  RT:
+    _modify:
+      RISETIME:
+        bitWidth: 7
+
 "SPI*":
   STAT:
     _modify:

devices/common_patches/gd32f205_207.yaml

@@ -20,6 +20,10 @@
     _modify:
       DISSTRC:
         name: SS
+  CTL1:
+    I2CCLK: [2,60]
+  RT:
+    RISETIME: [0,63]
   SADDR0:
     _merge: ["ADDRESS*"]
   STAT1:

devices/gd32c103.yaml

@@ -0,0 +1,25 @@
+# Copyright 2023 The gd32-rs authors.
+#
+# SPDX-License-Identifier: MIT OR Apache-2.0
+
+_svd: ../svd/gd32c103.svd
+
+_include:
+  - common_patches/gd32e1xx.yaml
+  - ../peripherals/adc/adc_e1.yaml
+  - ../peripherals/can/can_c1.yaml
+  - ../peripherals/crc/crc.yaml
+  - ../peripherals/dac/dac_e1.yaml
+  - ../peripherals/dbg/dbg_e1.yaml
+  - ../peripherals/dma/dma.yaml
+  - ../peripherals/exti/exti.yaml
+  - ../peripherals/flash/flash_e1.yaml
+  - ../peripherals/fwdgt/fwdgt_f2_f3.yaml
+  - ../peripherals/gpio/gpio_e1.yaml
+  - ../peripherals/i2c/i2c_e1.yaml
+  - ../peripherals/pmu/pmu.yaml
+  - ../peripherals/rcu/rcu_e1.yaml
+  - ../peripherals/spi/spi_e1.yaml
+  - ../peripherals/timer/timers_e1.yaml
+  - ../peripherals/usart/usart_f2_f3.yaml
+  - ../peripherals/wwdg/wwdg.yaml

devices/gd32c113.yaml

@@ -0,0 +1,25 @@
+# Copyright 2023 The gd32-rs authors.
+#
+# SPDX-License-Identifier: MIT OR Apache-2.0
+
+_svd: ../svd/gd32c113.svd
+
+_include:
+  - common_patches/gd32e1xx.yaml
+  - ../peripherals/adc/adc_e1.yaml
+  - ../peripherals/can/can_c1.yaml
+  - ../peripherals/crc/crc.yaml
+  - ../peripherals/dac/dac_e1.yaml
+  - ../peripherals/dbg/dbg_e1.yaml
+  - ../peripherals/dma/dma.yaml
+  - ../peripherals/exti/exti.yaml
+  - ../peripherals/flash/flash_e1.yaml
+  - ../peripherals/fwdgt/fwdgt_f2_f3.yaml
+  - ../peripherals/gpio/gpio_e1.yaml
+  - ../peripherals/i2c/i2c_e1.yaml
+  - ../peripherals/pmu/pmu.yaml
+  - ../peripherals/rcu/rcu_e1.yaml
+  - ../peripherals/spi/spi_e1.yaml
+  - ../peripherals/timer/timers_e1.yaml
+  - ../peripherals/usart/usart_f2_f3.yaml
+  - ../peripherals/wwdg/wwdg.yaml

gd32_part_table.yaml

@@ -22,6 +22,21 @@ gd32e1:
     rm_url: https://www.gigadevice.com/manual/gd32e103xx-user-manual/
     members:
       - GD32E103
+gd32c1:
+  gd32c103:
+    url: https://www.gigadevice.com/products/microcontrollers/gd32/arm-cortex-m4/value-line/gd32c103-series/
+    rm: GD32C103
+    rm_title: GD32C103
+    rm_url: https://gd32mcu.com/download/down/document_id/269/path_type/1
+    members:
+      - GD32C103
+  gd32c113:
+    url: https://www.gigadevice.com/products/microcontrollers/gd32/arm-cortex-m4/value-line/gd32c113-series/
+    rm: GD32C103
+    rm_title: GD32C113
+    rm_url: https://gd32mcu.com/download/down/document_id/382/path_type/1
+    members:
+      - GD32C113
 gd32e2:
   gd32e230:
     url: https://www.gigadevice.com/products/microcontrollers/gd32/arm-cortex-m23/value-line/gd32e230-series/

peripherals/can/can_c1.yaml

@@ -0,0 +1,17 @@
+# Copyright 2023 The gd32-rs authors.
+#
+# SPDX-License-Identifier: MIT OR Apache-2.0
+
+"CAN*":
+  BT:
+    _modify:
+      "BS1_0_3":
+        name: "BS1"
+      "BS1_4_6":
+        name: "BS1H"
+      "BS2_0_2":
+        name: "BS2"
+      "BS2_3_4":
+        name: "BS2H"
+_include:
+  - can_common.yaml

peripherals/can/can_common.yaml

@@ -196,7 +196,7 @@
       Enabled: [1, "Loop Back Mode enabled"]
     SJW: [0, 3]
     "BS?": [0, 3]
-    BAUDPSC: [0, 0x400]
+    BAUDPSC: [0, 0x3FF]
   "TMI?,RFIFOMI?":
     SFID:
     EFID:

peripherals/dac/dac_2ch_common.yaml

@@ -38,6 +38,6 @@ DAC:
   "DACC_L12DH":
     "DAC?_DH": [0, 0xFFF]
   "DACC_R8DH":
-    "DAC?_DH": [0, 0xFFF]
+    "DAC?_DH": [0, 0xFF]
   "DAC[01]_DO":
     "DAC?_DO": [0, 0xFFF]

peripherals/i2c/i2c_e1.yaml

@@ -11,3 +11,7 @@ _include:
     FMPEN:
       Disabled: [0, "Fast mode plus disabled"]
       Enabled: [1, "Fast mode plus (1MHz max) enabled"]
+  CTL1:
+    I2CCLK: [2, 60]
+  RT:
+    RISETIME: [0, 0x3F]

scripts/makecrates.py

@@ -21,6 +21,7 @@
 
 CRATE_DOC_FEATURES = {
     "gd32e1": ["rt", "gd32e103"],
+    "gd32c1": ["rt", "gd32c103", "gd32c113"],
     "gd32e2": ["rt", "gd32e230", "gd32e231"],
     "gd32e5": ["rt", "gd32e503", "gd32e508"],
     "gd32f1": ["rt", "gd32f130", "gd32f190"],
@@ -30,6 +31,7 @@
 
 CRATE_DOC_TARGETS = {
     "gd32e1": "thumbv7m-none-eabi",
+    "gd32c1": "thumbv7m-none-eabi",
     "gd32e2": "thumbv8m.base-none-eabi",
     "gd32e5": "thumbv8m.base-none-eabi",
     "gd32f1": "thumbv7m-none-eabi",

svd/extract.sh

@@ -7,6 +7,9 @@
 # Copy GD32 SVD files and give them lower-case names.
 cp vendor/GD32E10x.svd gd32e103.svd
 
+cp vendor/GD32C10x.svd gd32c103.svd
+cp vendor/GD32C11x.svd gd32c113.svd
+
 cp vendor/GD32E230.svd gd32e230.svd
 cp vendor/GD32E231.svd gd32e231.svd