cleaning

armsrc/fpgaloader.c

@@ -145,7 +145,7 @@ void FpgaSetupSscExt(uint8_t clearPCER) {
 
 	// clock comes from TK pin, no clock output, outputs change on falling
 	// edge of TK, sample on rising edge of TK, start on positive-going edge of sync
-	AT91C_BASE_SSC->SSC_TCMR = SSC_CLOCK_MODE_SELECT(2) |	SSC_CLOCK_MODE_START(5);
+	AT91C_BASE_SSC->SSC_TCMR = SSC_CLOCK_MODE_SELECT(2) | SSC_CLOCK_MODE_START(5);
 
 	// tx framing is the same as the rx framing
 	AT91C_BASE_SSC->SSC_TFMR = AT91C_BASE_SSC->SSC_RFMR;

armsrc/iclass.c

@@ -1127,11 +1127,14 @@ void SimulateIClass(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datain
 	LEDsoff();
 
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+
 	// this will clear out bigbuf memory,  the eload command must select this before!
 	FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
-	FpgaSetupSsc();
+
 	SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
-
+
+	FpgaSetupSsc();
+
 	// Enable and clear the trace
 	clear_trace();
 	set_tracing(true);
@@ -1799,9 +1802,9 @@ void setupIclassReader() {
 
     FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
 
-    FpgaSetupSsc();
-
     SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
+
+    FpgaSetupSsc();
 
     // Reset trace buffer
 	clear_trace();

armsrc/iso15693.c

@@ -950,7 +950,7 @@ void ReaderIso15693(uint32_t parameter) {
 // all demodulation performed in arm rather than host. - greg
 void SimTagIso15693(uint32_t parameter, uint8_t *uid) {
 
-	FpgaDownloadAndGo(FPGA_BITSTREAM_HF);		
+	FpgaDownloadAndGo(FPGA_BITSTREAM_HF);	
 	SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
 	FpgaSetupSsc();
 	// Start from off (no field generated)