-
Notifications
You must be signed in to change notification settings - Fork 125
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
inverse cpu and rust wrappers #747
base: main
Are you sure you want to change the base?
Conversation
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Looks good, left comment, also add golang wrapper
@@ -24,6 +24,7 @@ enum VecOperation { | |||
VECTOR_SUB, | |||
VECTOR_MUL, | |||
VECTOR_DIV, | |||
VECTOR_INV, |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Can break code compatibility? should add as last and a TODO to re-order on next major
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
It's internal code of CPU backend. I don't think anyone is using it, especially since it is a cpp file, not a header.
@@ -69,6 +69,12 @@ pub trait VecOps<F> { | |||
cfg: &VecOpsConfig, | |||
) -> Result<(), eIcicleError>; | |||
|
|||
fn inv( | |||
a: &(impl HostOrDeviceSlice<F> + ?Sized), |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
suggest renaming a->input and result->output or something other than a,result
@@ -371,6 +377,19 @@ where | |||
<<F as FieldImpl>::Config as VecOps<F>>::div(a, b, result, &cfg) | |||
} | |||
|
|||
pub fn inv_scalars<F>( | |||
a: &(impl HostOrDeviceSlice<F> + ?Sized), |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
same here
cuda-backend-branch: emir/inverse