Skip to content

Commit

Permalink
Bump version to 47.0.0 in preparation for R47 (fvdhoef#31)
Browse files Browse the repository at this point in the history
* Bump version to 0.47.0 in preparation for R47

* Update top.v

Update major revision to 47 to match kernel.
  • Loading branch information
jburks authored Mar 28, 2024
1 parent fd78f27 commit 45cc1f0
Showing 1 changed file with 3 additions and 3 deletions.
6 changes: 3 additions & 3 deletions fpga/source/top.v
Original file line number Diff line number Diff line change
Expand Up @@ -188,23 +188,23 @@ module top(
case(dc_select_r)
6'h0: rddata = dc_hscale_r;
6'h1: rddata = dc_active_hstop_r[9:2];
default: rddata = 8'h00;
default: rddata = 8'd47;
endcase
end
5'h0B: begin
case(dc_select_r)
6'h0: rddata = dc_vscale_r;
6'h1: rddata = dc_active_vstart_r[8:1];
6'h5: rddata = fx_fill_length_low;
default: rddata = 8'h03;
default: rddata = 8'd0;
endcase
end
5'h0C: begin
case(dc_select_r)
6'h0: rddata = dc_border_color_r;
6'h1: rddata = dc_active_vstop_r[8:1];
6'h5: rddata = fx_fill_length_high;
default: rddata = 8'h03;
default: rddata = 8'd0;
endcase
end

Expand Down

0 comments on commit 45cc1f0

Please sign in to comment.