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mentioned by krste: https://youtu.be/QFPQ_kTsbtw?si=BQpxvhdyXgYLDmVN&t=690
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= XTeic | ||
Jan Oleksiewicz <[email protected]> | ||
:appversion: 0.34.7 | ||
:appversion: 0.34.8 | ||
:toc: | ||
:toclevels: 5 | ||
:sectnums: | ||
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@@ -55,6 +55,9 @@ A quick recap of what we already have available. | |
<<armnvic>> defacto established "industry standard" of efficient interrupt handling. | ||
Anyone complaining about risc-v likes and wants the NVIC. | ||
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The addition of trustzone in armv8m, increases the interrupt latency/jitter due to | ||
the need of preserving and zeroing extra "unnecessary" registers. (to prevent potential leaks) | ||
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==== CLIC | ||
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CLIC <<clic>> is a designated goto for interrupt handling to fulfill everyone needs. | ||
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@@ -391,6 +394,9 @@ Those have to take the second round of waitstates or cache miss without amortiza | |
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And if the code is far away from vector table (e.g. in SRAM for more deterministic execution), | ||
compiler will have to emit a jump island, aka "veener", that will perform yet another unamortized jump. | ||
Additionally far jumps require a free register which in typical scenario | ||
reqires pushing to stack and returning to veener from handler to handle epilogue. | ||
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allocating 8 bytes per entry, allowing `lui` + `jalr` sequence, will severly trump the | ||
code density and performance in typical use scenarios. | ||
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