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[dv] Add riscv_ram_intg_test #2184

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@nasahlpa nasahlpa commented Jul 2, 2024

This test injects a fault into different MuBi encoded signals within the prim_ram_1p_scr and prim_ram_1p_adv and checks whether a fatal alert is triggered.

I have excluded the addr_match signal from FI as its encoding is not directly checked. If the signal was a MuBi True, a fault into it is treated by the mubi4_and_hi as a False. If the signal was a MuBi False, a fault into it is treated by the mubi4_and_hi also as a False. Hence, no address collision occurs and the holding register is not returned.

This PR is based on #2182 and closes #2173.

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This looks good to me. One nitty question about ^=, but I'm happy either way!

dv/uvm/core_ibex/tests/core_ibex_test_lib.sv Outdated Show resolved Hide resolved
@nasahlpa nasahlpa force-pushed the ibex_fi_tests branch 4 times, most recently from bb81156 to 29c0fae Compare July 2, 2024 12:46
This test injects a fault into different MuBi encoded signals within
the prim_ram_1p_scr and prim_ram_1p_adv and checks whether a fatal
alert is triggered.

I have excluded the addr_match signal from FI as its encoding
is not directly checked. If the signal was a MuBi True, a
fault into it is treated by the mubi4_and_hi as a False.
If the signal was a MuBi False, a fault into it is treated
by the mubi4_and_hi also as a False. Hence, no address
collision occurs and the holding register is not returned.

This PR is based on lowRISC#2182 and closes lowRISC#2173.

Signed-off-by: Pascal Nasahl <[email protected]>
@nasahlpa nasahlpa added this pull request to the merge queue Jul 4, 2024
Merged via the queue into lowRISC:master with commit 0e0f27a Jul 4, 2024
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[dv] Implement fault injection tests for prim_ram_1p_scr MUBI values
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