Skip to content

[multitop_dev] Port DIF to multitop and two FPGA tests #2011

[multitop_dev] Port DIF to multitop and two FPGA tests

[multitop_dev] Port DIF to multitop and two FPGA tests #2011

Triggered via pull request November 19, 2024 13:38
Status Failure
Total duration 2h 47m 3s
Artifacts 3

ci.yml

on: pull_request
Fit to window
Zoom out
Zoom in

Annotations

4 errors
Verible lint
Process completed with exit code 1.
Verilated English Breakfast
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
CW305's Bitstream
Process completed with exit code 1.

Artifacts

Produced during runtime
Name Size
lowRISC~opentitan~ESGERV.dockerbuild
99.2 KB
lowRISC~opentitan~QUTTKD.dockerbuild
18.3 KB
verilated_englishbreakfast
6.57 MB