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applications: sdp: mspi: Ipc communication reaction
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Added reactions to all mspi Ipc messages but NRFE_MSPI_TXRX and NRFE_MSPI_TX, data recived through IPC is stored in local structures for later use.

Signed-off-by: Michal Frankiewicz <[email protected]>
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mif1-nordic committed Jan 8, 2025
1 parent e9f6916 commit f7f113a
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Showing 4 changed files with 372 additions and 493 deletions.
2 changes: 2 additions & 0 deletions applications/sdp/mspi/boards/nrf54l15dk_nrf54l15_cpuflpr.conf
Original file line number Diff line number Diff line change
Expand Up @@ -44,3 +44,5 @@ CONFIG_SYS_CLOCK_EXISTS=n

CONFIG_OUTPUT_DISASSEMBLY=y
CONFIG_COMMON_LIBC_MALLOC=n

CONFIG_COMPILER_OPT="-fshort-enums"
66 changes: 20 additions & 46 deletions applications/sdp/mspi/src/hrt/hrt.h
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Expand Up @@ -10,67 +10,41 @@
#include <stdint.h>
#include <stdbool.h>
#include <drivers/mspi/nrfe_mspi.h>
#include <zephyr/drivers/mspi.h>

/* Max word size. */
#define MAX_WORD_SIZE NRF_VPR_CSR_VIO_SHIFT_CNT_OUT_BUFFERED_MAX
#define BIT_SET_VALUE(var, pos, value) ((var & (~(1 << pos))) | (value << pos))

/* Macro for getting direction mask for specified pin and direction. */
#define PIN_DIR_MASK(PIN_NUM, DIR) \
(VPRCSR_NORDIC_DIR_PIN##PIN_NUM##_##DIR << VPRCSR_NORDIC_DIR_PIN##PIN_NUM##_Pos)
#define VPRCSR_NORDIC_OUT_HIGH 1
#define VPRCSR_NORDIC_OUT_LOW 0

/* Macro for getting output mask for specified pin. */
#define PIN_DIR_OUT_MASK(PIN_NUM) PIN_DIR_MASK(PIN_NUM, OUTPUT)
#define VPRCSR_NORDIC_DIR_OUTPUT 1
#define VPRCSR_NORDIC_DIR_INPUT 0

/* Macro for getting input mask for specified pin. */
#define PIN_DIR_IN_MASK(PIN_NUM) PIN_DIR_MASK(PIN_NUM, INPUT)

/* Macro for getting state mask for specified pin and state. */
#define PIN_OUT_MASK(PIN_NUM, STATE) \
(VPRCSR_NORDIC_OUT_PIN##PIN_NUM##_##STATE << VPRCSR_NORDIC_OUT_PIN##PIN_NUM##_Pos)

/* Macro for getting high state mask for specified pin. */
#define PIN_OUT_HIGH_MASK(PIN_NUM) PIN_OUT_MASK(PIN_NUM, HIGH)

/* Macro for getting low state mask for specified pin. */
#define PIN_OUT_LOW_MASK(PIN_NUM) PIN_OUT_MASK(PIN_NUM, LOW)
#define BITS_IN_WORD 32
#define BITS_IN_BYTE 8

/** @brief Low level transfer parameters. */
struct hrt_ll_xfer {
/** @brief Top value of VTIM. This will determine clock frequency
* (SPI_CLOCK ~= CPU_CLOCK / (2 * TOP)).
*/
volatile uint8_t counter_top;

/** @brief Word size of passed data, bits. */
volatile uint8_t word_size;
struct hrt_xfer {

/** @brief Data to send, under each index there is data of length word_size. */
volatile uint32_t *data_to_send;
/** @brief When true clock signal makes 1 transition less.
* It is required for spi modes 1 and 3 due to hardware issue.
*/
bool eliminate_last_pulse;

/** @brief Data length. */
volatile uint8_t data_len;
/** @brief Tx mode mask for csr dir register */
uint16_t tx_direction_mask;

/** @brief If true chip enable pin will be left active after transfer */
volatile uint8_t ce_hold;
/** @brief Rx mode mask for csr dir register */
uint16_t rx_direction_mask;

/** @brief Chip enable pin polarity in enabled state. */
volatile bool ce_enable_state;
};

/** @brief Write on single line.
*
* Function to be used to write data on single data line (SPI).
*
* @param[in] xfer_ll_params Low level transfer parameters.
*/
void write_single_by_word(volatile struct hrt_ll_xfer xfer_ll_params);

/** @brief Write on four lines.
/** @brief Write.
*
* Function to be used to write data on quad data line (SPI).
* Function to be used to write data on SPI.
*
* @param[in] xfer_ll_params Low level transfer parameters.
*/
void write_quad_by_word(volatile struct hrt_ll_xfer xfer_ll_params);
void hrt_write(struct hrt_xfer *xfer_ll_params);

#endif /* _HRT_H__ */
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