Added Verilog-AMS Syntax Highlighter

CHANGELOG.md

@@ -3,6 +3,11 @@
 All notable changes to this project will be documented in this file.
 
 The format is based on [Keep a Changelog](http://keepachangelog.com/en/1.0.0/)\
+## [1.15.6] - 2025-01-22
+
+### Unreleased
+
+- Added Verilog-AMS syntax highlighting
 
 ## [1.15.5] - 2024-11-09
 

README.md

@@ -18,6 +18,7 @@ Install it from [VS Code Marketplace](https://marketplace.visualstudio.com/items
   - SystemVerilog
   - Bluespec SystemVerilog
   - VHDL
+  - Verilog-AMS
   - Vivado UCF constraints
   - Synopsys Design Constraints
   - Verilog Filelists (dot-F files)

configs/verilogams.configuration.json

@@ -0,0 +1,64 @@
+{
+  "comments": {
+    "lineComment": "//",
+    "blockComment": ["/*", "*/"]
+  },
+
+  "brackets": [
+    ["{", "}"],
+    ["[", "]"],
+    ["(", ")"],
+    ["fork", "join"],
+    ["case", "endcase"],
+    ["casex", "endcase"],
+    ["casez", "endcase"],
+    ["config", "endconfig"],
+    ["begin", "end"],
+    ["connectrules", "endconnectrules"],
+    ["discipline", "enddiscipline"],
+    ["function", "endfunction"],
+    ["generate", "endgenerate"],
+    ["module", "endmodule"],
+    ["connectmodule","endmodule"],
+    ["macromodule", "endmodule"],
+    ["nature", "endnature"],
+    ["paramset", "endparamset"],
+    ["primitive", "endprimitive"],
+    ["specify", "endspecify"],
+    ["table", "endtable"],
+    ["task", "endtask"]
+  ],
+
+  "autoClosingPairs": [
+    { "open": "{", "close": "}" },
+    { "open": "[", "close": "]" },
+    { "open": "(", "close": ")" },
+    { "open": "\"", "close": "\"", "notIn": ["string"] },
+    { "open": "/*", "close": " */", "notIn": ["string"] },
+    { "open": "begin", "close": "\nend", "notIn": ["string"] },
+    { "open": "fork", "close": "\njoin", "notIn": ["string"] }
+  ],
+
+  "surroundingPairs": [
+    ["{", "}"],
+    ["[", "]"],
+    ["(", ")"],
+    ["'", "'"],
+    ["\"", "\""],
+    ["`", "`"]
+  ],
+
+  "folding": {
+    "offSide": true,
+    "markers": {
+      "start": "^\\s*[//]*region",
+      "end": "^\\s*[//]*endregion"
+    }
+  },
+
+  "wordPattern": "(-?\\d*\\.\\d\\w*)|([^\\`\\~\\!\\@\\#\\%\\^\\&\\*\\(\\)\\-\\=\\+\\[\\{\\]\\}\\\\\\|\\;\\:\\'\\\"\\,\\.\\<\\>\\/\\?\\s]+)",
+  "indentationRules": {
+    "increaseIndentPattern": "(begin$)",
+    "decreaseIndentPattern": "(end$)"
+  }
+}

package.json

@@ -38,6 +38,21 @@
         ],
         "configuration": "./configs/verilog.configuration.json"
       },
+      {
+        "id": "verilogams",
+        "aliases": [
+          "Verilog-AMS",
+          "verilog-ams",
+          "vams",
+          "VAMS",
+          "verilogams"
+        ],
+        "extensions": [
+          ".vams",
+          ".va"
+        ],
+        "configuration": "./configs/verilogams.configuration.json"
+      },
       {
         "id": "systemverilog",
         "aliases": [
@@ -139,6 +154,11 @@
         "scopeName": "source.verilog",
         "path": "./syntaxes/verilog.tmLanguage.json"
       },
+      {
+        "language": "verilogams",
+        "scopeName": "source.verilogams",
+        "path": "./syntaxes/verilogams.tmLanguage.json"
+      },
       {
         "language": "systemverilog",
         "scopeName": "source.systemverilog",
@@ -196,6 +216,14 @@
         "language": "verilog",
         "path": "./snippets/verilog.json"
       },
+      {
+        "language": "verilogams",
+        "path": "./snippets/verilogams.json"
+      },
+      {
+        "language": "verilogams",
+        "path": "./snippets/verilog.json"
+      },
       {
         "language": "systemverilog",
         "path": "./snippets/verilog.json"

snippets/verilogams.json

@@ -0,0 +1,79 @@
+{
+    "ddt": {
+        "prefix": ["dd", "ddt"],
+        "body": [
+            "ddt ( ${1:exp}, ${2:[tol]} )"
+        ],
+        "description": "Time Derivative Operator"
+    },
+    "ddx": {
+        "prefix": ["dd", "ddx"],
+        "body": [
+            "ddx ( ${1:exp}, ${2:[unknown]} )"
+        ],
+        "description": "Symbolic Derivative Operator"
+    },
+    "idt": {
+        "prefix": ["id", "idt"],
+        "body": [
+            "idt ( ${1:exp[}, ${2:ic[}, ${3:assert[}, ${4:tol]]]} )"
+        ],
+        "description": "Time Integral Operator"
+    },
+    "idtmod": {
+        "prefix": ["idtm", "idtmod"],
+        "body": [
+            "idtmod ( ${1:exp[}, ${2:ic[}, ${3:modulus[}, ${4:offset[}, ${5:tol]]]]} )"
+        ],
+        "description": "Circular Integral Operator"
+    },
+    "absdelay": {
+        "prefix": ["abs", "absdelay"],
+        "body": [
+            "absdelay ( ${1:exp}, ${2:td[}, ${3:max_delay]} )"
+        ],
+        "description": "Absolute Delay Operator"
+    },
+    "transition": {
+        "prefix": ["trans", "transition"],
+        "body": [
+            "transition ( ${1:exp[}, ${2:td[}, ${3:rise_time[}, ${4:fall_time[}, ${3:time_tol]]]]})"
+        ],
+        "description": "Transition Filter"
+    },
+    "slew": {
+        "prefix": ["sl", "slew"],
+        "body": [
+            "slew ( ${1:exp[}, ${2:max_pos_slew_rate[}, ${3:max_neg_slew_rate]]})"
+        ],
+        "description": "Slew Filter"
+    },
+    "last_crossing": {
+        "prefix": ["sl", "slew"],
+        "body": [
+            "slew ( ${1:exp[}, ${2:direction]})"
+        ],
+        "description": "Last Crossing Function"
+    },
+    "limexp": {
+        "prefix": ["lim", "limexp"],
+        "body": [
+            "limexp ( ${1:exp})"
+        ],
+        "description": "Limited Exponential"
+    },
+    "laplace": {
+        "prefix": ["lap", "laplace"],
+        "body": [
+            "laplace_${1:zp/zd/np/nd} ( ${2:exp}, ${3:Zero}, ${4:Pole [}, ${5:tol]})"
+        ],
+        "description": "Laplace Transform Filters"
+    },
+    "zfilter": {
+        "prefix": ["z", "zi"],
+        "body": [
+            "zi_${1:zp/zd/np/nd} ( ${2:exp}, ${3:Zero}, ${4:Pole }, ${5:period[}, ${6:transition time[}, ${7:time first transition]]})"
+        ],
+        "description": "Z Transform Filters"
+    }
+}