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Achievements

Achievement: YOLOAchievement: QuickdrawAchievement: Pull Sharkx2

Achievements

Achievement: YOLOAchievement: QuickdrawAchievement: Pull Sharkx2

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@OnalabsInnoHub

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nmb735/README.md

Hi👋🏾, I'm Nedal Benelmekki

nmb735

Firmware&Hardware

nmb735

👨🏾‍💻 About Me:

🛠️ Top Languages and Tools:

💻 Programming Languages & Web Development:

c cplusplus python csharp javascript php html5 css3

🔧 Hardware, Microcontrollers, and OS:

linux arduino raspberrypi vhdl stm32 bash

🖥️ PCB Design & ECAD:

eagle kicad altium spice

📡 Telecommunications:

matlab SDR

⚙️ Version Control:

git

📊 Databases:

mysql sqlite postgresql mongodb

🤝🏾 Connect with me:

nedal-benelmekki

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  1. AI-Project-2 AI-Project-2 Public

    Application of artificial intelligence algorithms for the creation of a tool for labeling clothing items by type and color.

    Python

  2. LP-OSM LP-OSM Public

    Final project for the LP (Laboratori de Programació) subject in UAB, part of the first course of the Computer Science Engineering degree (BSc).

    C++ 1

  3. SDiHW-Microprocessor SDiHW-Microprocessor Public

    Final project for the SDiHW (Sistemes Digitals i Llenguatges de descripció del Hardware) subject in UAB, part of the second course of the Electronic Engineering degree (BSc).

    VHDL

  4. SSD-Signal-Processing-Lab SSD-Signal-Processing-Lab Public

    Signal processing laboratory projects for the SSD (Senyals i Sistemes Discrets) subject in UAB, part of the second course of the Electronic Engineering degree (BSc).

    MATLAB

  5. FONCOM-ASK-Communication-System-SDR FONCOM-ASK-Communication-System-SDR Public

    ASK Communication System implemented with SDR (Software Defined Radio) in GNU Radio. Part of the final project for FONCOM (Fonaments de Comunicacions) subject in UAB, part of the second course of t…

    Python 1

  6. CiTE-Low-Pass-Filter CiTE-Low-Pass-Filter Public

    Full implementation of a fourth-order low-pass filter. The circuit design is based on the use of two cascaded second-order Sallen-Key configurations. Presented as the final project of CiTE (Circuit…

    Prolog