tests: benchmarks: multicore: Add PM tests with FLPR core

Add test that confirms Power Management on FLPR core.

Signed-off-by: Sebastian Głąb <[email protected]>

tests/benchmarks/multicore/idle_flpr/CMakeLists.txt

@@ -0,0 +1,19 @@
+#
+# Copyright (c) 2024 Nordic Semiconductor ASA
+#
+# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+#
+
+cmake_minimum_required(VERSION 3.20.0)
+
+find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
+
+if(NOT SYSBUILD)
+	message(FATAL_ERROR
+		" This is a multi-image application that should be built using sysbuild.\n"
+		" Add --sysbuild argument to west build command to prepare all the images.")
+endif()
+
+project(idle_flpr)
+
+target_sources(app PRIVATE src/main.c)

tests/benchmarks/multicore/idle_flpr/Kconfig

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+#
+# Copyright (c) 2024 Nordic Semiconductor ASA
+#
+# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+#
+
+config TEST_SLEEP_DURATION_MS
+	int "Core sleep duration (miliseconds)"
+	default 1000
+	help
+	  Set sleep duration to TEST_SLEEP_DURATION_MS miliseconds.
+	  Based on the value of 'min-residency-us' specified for each power state defined in the DTS,
+	  core enters the lowest possible power state.
+
+source "Kconfig.zephyr"

tests/benchmarks/multicore/idle_flpr/boards/nrf54h20dk_nrf54h20_cpuapp.overlay

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+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+ */
+
+&cpuflpr_vpr {
+	status = "okay";
+};
+
+&uart120 {
+	status = "reserved";
+	interrupt-parent = <&cpuflpr_clic>;
+};
+
+/ {
+	aliases {
+		/delete-property/ led1;
+	};
+};
+
+/delete-node/ &led1;
+
+&gpiote130 {
+	status = "okay";
+	owned-channels = <0>;
+};

tests/benchmarks/multicore/idle_flpr/prj.conf

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+CONFIG_BOOT_BANNER=n
+CONFIG_NCS_BOOT_BANNER=n
+
+CONFIG_LOG=y
+CONFIG_ASSERT=y
+CONFIG_GPIO=y
+
+CONFIG_NRF_REGTOOL_VERBOSITY=1

tests/benchmarks/multicore/idle_flpr/prj_s2ram.conf

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+CONFIG_PM=y
+CONFIG_PM_S2RAM=y
+CONFIG_PM_S2RAM_CUSTOM_MARKING=y
+CONFIG_POWEROFF=y
+
+CONFIG_PM_DEVICE=y
+CONFIG_PM_DEVICE_RUNTIME=y
+
+CONFIG_BOOT_BANNER=n
+CONFIG_NCS_BOOT_BANNER=n
+CONFIG_PRINTK=n
+CONFIG_LOG=n
+CONFIG_CONSOLE=n
+CONFIG_UART_CONSOLE=n
+CONFIG_SERIAL=n
+
+CONFIG_ASSERT=y
+CONFIG_GPIO=y

tests/benchmarks/multicore/idle_flpr/remote/CMakeLists.txt

@@ -0,0 +1,14 @@
+#
+# Copyright (c) 2024 Nordic Semiconductor ASA
+#
+# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+#
+
+cmake_minimum_required(VERSION 3.20.0)
+
+find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
+project(remote)
+
+target_sources(app PRIVATE src/main.c)
+target_sources(app PRIVATE src/power_off.c)
+message(STATUS "Power Mode handler for RISC V is included.")

tests/benchmarks/multicore/idle_flpr/remote/Kconfig

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+#
+# Copyright (c) 2024 Nordic Semiconductor ASA
+#
+# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+#
+
+config TEST_SLEEP_DURATION_MS
+	int "Core sleep duration (miliseconds)"
+	default 1000
+	help
+	  Set sleep duration to TEST_SLEEP_DURATION_MS miliseconds.
+	  Based on the value of 'min-residency-us' specified for each power state defined in the DTS,
+	  core enters the lowest possible power state.
+
+config APP_PROVIDE_PM_HOOKS
+	bool "Application provides PM hooks"
+	default y
+	select HAS_PM
+	select HAS_POWEROFF
+
+source "Kconfig.zephyr"

tests/benchmarks/multicore/idle_flpr/remote/boards/nrf54h20dk_nrf54h20_cpuflpr.overlay

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+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+ */
+
+/ {
+	cpus {
+		power-states {
+			wait: wait {
+				compatible = "zephyr,power-state";
+				power-state-name = "standby";
+				substate-id = <0>;
+				min-residency-us = <20000>;
+			};
+
+			hibernate: hibernate {
+				compatible = "zephyr,power-state";
+				power-state-name = "suspend-to-ram";
+				substate-id = <0>;
+				min-residency-us = <400000>;
+			};
+		};
+	};
+};
+
+&cpu {
+	cpu-power-states = <&wait &hibernate>;
+};

tests/benchmarks/multicore/idle_flpr/remote/prj.conf

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+CONFIG_LOG=y
+CONFIG_CONSOLE=n
+CONFIG_UART_CONSOLE=n
+CONFIG_SERIAL=n
+CONFIG_BOOT_BANNER=n
+CONFIG_NCS_BOOT_BANNER=n
+CONFIG_PRINTK=n
+
+CONFIG_ASSERT=y
+
+CONFIG_NRF_REGTOOL_VERBOSITY=1

tests/benchmarks/multicore/idle_flpr/remote/prj_s2ram.conf

@@ -0,0 +1,13 @@
+CONFIG_PM=y
+CONFIG_POWEROFF=y
+
+CONFIG_PM_DEVICE=y
+CONFIG_PM_DEVICE_RUNTIME=y
+
+CONFIG_CONSOLE=n
+CONFIG_UART_CONSOLE=n
+CONFIG_SERIAL=n
+CONFIG_BOOT_BANNER=n
+CONFIG_NCS_BOOT_BANNER=n
+
+CONFIG_ASSERT=y

tests/benchmarks/multicore/idle_flpr/remote/src/main.c

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+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+ */
+#include <zephyr/kernel.h>
+
+#include <zephyr/logging/log.h>
+LOG_MODULE_REGISTER(idle_flpr, LOG_LEVEL_INF);
+
+/* Variables used to make CPU active for ~1 second */
+// static struct k_timer my_timer;
+// static bool timer_expired;
+// volatile uint32_t make_busy;
+
+// void my_timer_handler(struct k_timer *dummy)
+// {
+// 	timer_expired = true;
+// }
+
+int main(void)
+{
+//	int counter = 0;
+
+	LOG_INF("Multicore idle_flpr test on %s", CONFIG_BOARD_TARGET);
+	LOG_INF("Main sleeps for %d ms", CONFIG_TEST_SLEEP_DURATION_MS);
+
+// 	k_timer_init(&my_timer, my_timer_handler, NULL);
+
+// 	/* Run test forever */
+// 	while (1) {
+// 		timer_expired = false;
+
+// 		/* start a one-shot timer that expires after 1 second */
+// 		k_timer_start(&my_timer, K_MSEC(1000), K_NO_WAIT);
+
+// 		/* Keep CPU active for ~ 1 second */
+// 		while (!timer_expired) {
+// 			LOG_INF("a");
+// 			k_busy_wait(10000);
+// //			k_msleep(100);
+// 			make_busy++;
+// 			LOG_INF("b");
+// 			k_yield();
+// 			LOG_INF("c");
+// 		}
+
+// 		LOG_INF("Run %d", counter);
+// 		counter++;
+
+// 		/* Sleep / enter low power state */
+// 		k_msleep(CONFIG_TEST_SLEEP_DURATION_MS);
+// 	}
+
+	return 0;
+}

tests/benchmarks/multicore/idle_flpr/remote/src/power_off.c

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+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+ */
+#include <zephyr/kernel.h>
+#include <zephyr/pm/pm.h>
+#include <zephyr/devicetree.h>
+#include <hal/nrf_vpr_csr.h>
+
+#include <zephyr/logging/log.h>
+LOG_MODULE_REGISTER(power_off, LOG_LEVEL_INF);
+
+#define VIPER_SLEEP_SUBSTATE_WAIT 0
+#define VIPER_SLEEP_SUBSTATE_SLEEP 1
+#define VIPER_SLEEP_SUBSTATE_HIBERNATE 0
+#define VIPER_SLEEP_SUBSTATE_DEEPSLEEP 1
+
+static void pm_go_to_wait(void)
+{
+	LOG_INF("Wait Sleep State");
+
+	csr_write(VPRCSR_NORDIC_VPRNORDICSLEEPCTRL,
+		  VPRCSR_NORDIC_VPRNORDICSLEEPCTRL_SLEEPSTATE_WAIT);
+	nrf_barrier_w();
+	arch_cpu_idle();
+}
+
+static void pm_go_to_hibernate(void)
+{
+	LOG_INF("Hibernate Sleep State");
+
+	csr_write(VPRCSR_NORDIC_VPRNORDICSLEEPCTRL,
+		  VPRCSR_NORDIC_VPRNORDICSLEEPCTRL_SLEEPSTATE_HIBERNATE);
+	nrf_barrier_w();
+	arch_cpu_idle();
+}
+
+/**
+ * @brief Zephyr callback function to set/enter new PM State
+ *
+ * @param state Current PM State
+ * @param substate_id Substate of current PM State
+ */
+void pm_state_set(enum pm_state state, uint8_t substate_id)
+{
+	LOG_INF("PPR pm_state_set: %d\t%d", (int)state, (int)substate_id);
+
+	switch (state) {
+	case PM_STATE_SUSPEND_TO_RAM: {
+		switch (substate_id) {
+		case VIPER_SLEEP_SUBSTATE_HIBERNATE:
+			pm_go_to_hibernate();
+			break;
+		case VIPER_SLEEP_SUBSTATE_DEEPSLEEP:
+			/* do nothing */
+			break;
+		}
+	} break;
+	case PM_STATE_STANDBY: {
+		switch (substate_id) {
+		case VIPER_SLEEP_SUBSTATE_WAIT:
+			pm_go_to_wait();
+			break;
+		}
+	} break;
+	case PM_STATE_SUSPEND_TO_IDLE:
+	case PM_STATE_SUSPEND_TO_DISK:
+	case PM_STATE_SOFT_OFF:
+	case PM_STATE_COUNT:
+	case PM_STATE_ACTIVE:
+	case PM_STATE_RUNTIME_IDLE:
+		break;
+	}
+}
+
+/**
+ * @brief Zephyr callback function to exit current PM State
+ *
+ * @param state Current PM State
+ * @param substate_id Substate of current PM State
+ *
+ */
+void pm_state_exit_post_ops(enum pm_state state, uint8_t substate_id)
+{
+	LOG_INF("PPR pm_state_exit_post_ops");
+	ARG_UNUSED(substate_id);
+
+	csr_write(VPRCSR_NORDIC_VPRNORDICSLEEPCTRL,
+		  VPRCSR_NORDIC_VPRNORDICSLEEPCTRL_SLEEPSTATE_WAIT);
+
+	/* unlock interrupts after sleep */
+	irq_unlock(MSTATUS_IEN);
+}