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Fix potential timing loop in the memory write arbiter HPDcache Test CI #76: Commit 67cae53 pushed by cfuguet
February 1, 2025 23:31 2m 38s master
master
February 1, 2025 23:31 2m 38s
Fix potential timing loop in the memory write arbiter HPDcache Test CI #75: Pull request #64 opened by cfuguet
February 1, 2025 23:28 2m 28s cfuguet:fix/timing_loop_write_arbiter
cfuguet:fix/timing_loop_write_arbiter
February 1, 2025 23:28 2m 28s
Update the CHANGELOG.md for v5.0.1 release HPDcache Test CI #74: Commit 2d79f83 pushed by cfuguet
January 30, 2025 12:58 2m 32s v5.0.1
v5.0.1
January 30, 2025 12:58 2m 32s
Improve the area of the write buffer (#63) HPDcache Test CI #73: Commit 8a19490 pushed by cfuguet
January 30, 2025 11:05 2m 37s master
master
January 30, 2025 11:05 2m 37s
Improve the area of the write buffer HPDcache Test CI #72: Pull request #63 opened by cfuguet
January 30, 2025 09:46 3m 19s cfuguet:opt/improve_wbuf_area
cfuguet:opt/improve_wbuf_area
January 30, 2025 09:46 3m 19s
Fix $fatal syntax on initial assertions HPDcache Test CI #71: Commit 84e3cba pushed by cfuguet
January 29, 2025 14:37 2m 48s master
master
January 29, 2025 14:37 2m 48s
Fix $fatal syntax on initial assertions HPDcache Test CI #70: Pull request #62 synchronize by cfuguet
January 29, 2025 14:31 3m 43s cfuguet:fix/fatal_syscall
cfuguet:fix/fatal_syscall
January 29, 2025 14:31 3m 43s
Fix $fatal syntax on initial assertions HPDcache Test CI #69: Pull request #62 synchronize by cfuguet
January 29, 2025 14:31 4m 42s cfuguet:fix/fatal_syscall
cfuguet:fix/fatal_syscall
January 29, 2025 14:31 4m 42s
Fix $fatal syntax on initial assertions HPDcache Test CI #68: Pull request #62 opened by cfuguet
January 29, 2025 14:26 3m 42s cfuguet:fix/fatal_syscall
cfuguet:fix/fatal_syscall
January 29, 2025 14:26 3m 42s
Fix missing reset of the cmoh_flush_req_valid_q register HPDcache Test CI #67: Commit eefb4bc pushed by cfuguet
January 24, 2025 09:51 2m 39s master
master
January 24, 2025 09:51 2m 39s
Fix assertions and missing initialization of a register in the CMO FSM HPDcache Test CI #66: Pull request #59 synchronize by cfuguet
January 24, 2025 09:25 2m 39s cfuguet:ft/assertions
cfuguet:ft/assertions
January 24, 2025 09:25 2m 39s
Ensure no port width mismatch in flush controller HPDcache Test CI #65: Commit 1d77fd1 pushed by cfuguet
January 24, 2025 09:24 10m 15s master
master
January 24, 2025 09:24 10m 15s
Fix assertions and missing initialization of a register in the CMO FSM HPDcache Test CI #64: Pull request #59 synchronize by cfuguet
January 24, 2025 09:24 3m 34s cfuguet:ft/assertions
cfuguet:ft/assertions
January 24, 2025 09:24 3m 34s
Fix assertions and missing initialization of a register in the CMO FSM HPDcache Test CI #63: Pull request #59 opened by cfuguet
January 24, 2025 09:09 9m 59s cfuguet:ft/assertions
cfuguet:ft/assertions
January 24, 2025 09:09 9m 59s
Ensure no port width mismatch in flush controller HPDcache Test CI #62: Pull request #58 opened by ricted98
January 24, 2025 07:47 10m 24s ricted98:rt/flush-entries
ricted98:rt/flush-entries
January 24, 2025 07:47 10m 24s
cmo: fix flush operation that shall clear the dirty bit in directory HPDcache Test CI #60: Commit 04de808 pushed by cfuguet
January 5, 2025 01:03 3m 13s master
master
January 5, 2025 01:03 3m 13s
cmo: fix flush operation that shall clear the dirty bit in directory HPDcache Test CI #59: Pull request #56 opened by cfuguet
January 5, 2025 00:54 7m 43s cfuguet:fix/flush_updt_dir
cfuguet:fix/flush_updt_dir
January 5, 2025 00:54 7m 43s
Add support for responses for CMO operations (#55) HPDcache Test CI #58: Commit d300e52 pushed by cfuguet
January 4, 2025 13:55 10m 50s master
master
January 4, 2025 13:55 10m 50s
Add support for responses for CMO operations HPDcache Test CI #57: Pull request #55 opened by cfuguet
January 4, 2025 13:41 10m 51s cfuguet:ft/cmo_ack
cfuguet:ft/cmo_ack
January 4, 2025 13:41 10m 51s
Optimize some parts of the code for Verilator HPDcache Test CI #56: Commit ffde2e9 pushed by cfuguet
December 11, 2024 10:33 3m 31s master
master
December 11, 2024 10:33 3m 31s
Optimize some parts of the code for Verilator HPDcache Test CI #55: Pull request #53 opened by cfuguet
December 11, 2024 10:25 2m 38s cfuguet:dev/verilator_opt
cfuguet:dev/verilator_opt
December 11, 2024 10:25 2m 38s
tb: set randomly values for signals with Xs HPDcache Test CI #54: Commit ecfcdd7 pushed by cfuguet
December 10, 2024 10:02 2m 54s master
master
December 10, 2024 10:02 2m 54s
tb: set randomly values for signals with Xs HPDcache Test CI #53: Pull request #52 opened by cfuguet
December 10, 2024 09:58 3m 20s cfuguet:dev/tb
cfuguet:dev/tb
December 10, 2024 09:58 3m 20s
Add assertion on the number of words in a cacheline HPDcache Test CI #52: Commit c28b117 pushed by cfuguet
December 10, 2024 09:49 12m 24s master
master
December 10, 2024 09:49 12m 24s
Add assertion on the number of words in a cacheline HPDcache Test CI #51: Pull request #51 opened by cfuguet
December 10, 2024 09:36 11m 46s cfuguet:master
cfuguet:master
December 10, 2024 09:36 11m 46s