Merge pull request #159 from lvb2000/PR

Fixes in traceDecoder and loadelf
orbcode · Oct 27, 2024 · dfb021d · dfb021d
2 parents 3dfda27 + ff18fc2
commit dfb021d
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Showing 3 changed files with 29 additions and 11 deletions.
diff --git a/Inc/traceDecoder.h b/Inc/traceDecoder.h
@@ -143,6 +143,9 @@ struct TRACECPUState
 
     // Convinience, for debug reporting
     genericsReportCB report;
+
+    // Debugging
+    uint64_t overflows;       
 };
 
 // ============================================================================

diff --git a/Src/loadelf.c b/Src/loadelf.c
@@ -369,15 +369,15 @@ static void _processFunctionDie( struct symbol *p, Dwarf_Debug dbg, Dwarf_Die di
         attr_tag = DW_AT_abstract_origin;
         dwarf_attr( die, attr_tag, &attr_data, 0 );
         dwarf_global_formref( attr_data, &abstract_origin_offset, 0 );
-        dwarf_offdie_b( dbg, abstract_origin_offset, IS_INFO, &abstract_origin_die, 0 );
-        isinline = true;
-    }
-    else
-    {
-        dwarf_highpc_b ( die, &h, 0, &formclass, 0 );
-        dwarf_lowpc ( die, &l, 0 );
+        if (DW_DLV_OK == dwarf_offdie_b( dbg, abstract_origin_offset, IS_INFO, &abstract_origin_die, 0 ))
+        {
+            isinline = true;
+        }
     }
 
+    dwarf_highpc_b ( die, &h, 0, &formclass, 0 );
+    dwarf_lowpc ( die, &l, 0 );
+
     if ( formclass == DW_FORM_CLASS_CONSTANT )
     {
         h += l;
@@ -1001,7 +1001,7 @@ char *symbolDisassembleLine( struct symbol *p, enum instructionClass *ic, symbol
     if ( !p->caphandle )
     {
         /* Disassembler isn't initialised yet */
-        if ( cs_open( CS_ARCH_ARM, CS_MODE_THUMB + CS_MODE_LITTLE_ENDIAN, &p->caphandle ) != CS_ERR_OK )
+        if ( cs_open( CS_ARCH_ARM, CS_MODE_THUMB + CS_MODE_LITTLE_ENDIAN + CS_MODE_MCLASS, &p->caphandle ) != CS_ERR_OK )
         {
             return NULL;
         }
@@ -1044,6 +1044,14 @@ char *symbolDisassembleLine( struct symbol *p, enum instructionClass *ic, symbol
                               && strstr( insn->op_str, "pc" ) )
                 ) ? LE_IC_JUMP : 0;
 
+        /* create a copy to check if load in pc */
+        char *copy = strdup(insn->op_str);
+        *ic |=  (
+                            ( ( ( insn->id == ARM_INS_LDR ) )
+                              && strstr(strtok(copy,","), "pc" ) )
+                ) ? LE_IC_JUMP : 0;
+        free(copy);
+
         /* Was it an exception return? */
         *ic |=  ( ( insn->id == ARM_INS_ERET ) ) ? LE_IC_JUMP | LE_IC_IRET : 0;
 
@@ -1072,7 +1080,7 @@ char *symbolDisassembleLine( struct symbol *p, enum instructionClass *ic, symbol
 
                     if ( newaddr )
                     {
-                        *newaddr = detail->arm.operands[0].imm;
+                            *newaddr = detail->arm.operands[n].imm;
                     }
 
                     break;

diff --git a/Src/traceDecoder_etm4.c b/Src/traceDecoder_etm4.c
@@ -185,6 +185,11 @@ static bool _pumpAction( struct TRACEDecoderEngine *e, struct TRACECPUState *cpu
     }
     else
     {
+        if( c == 0x05 && j->asyncCount == 1)
+        {
+            cpu->overflows++;
+            DEBUG( "Overflow Detected. ReSync Trace Stream:" EOL );
+        }
         j->asyncCount = c ? 0 : j->asyncCount + 1;
 
         switch ( j->p )
@@ -336,7 +341,7 @@ static bool _pumpAction( struct TRACEDecoderEngine *e, struct TRACECPUState *cpu
 
                     case 0b11000000 ... 0b11010100:
                     case 0b11100000 ... 0b11110100: /* Atom format 6, Figure 6-44, Pg 6.307 */
-                        cpu->eatoms = ( c & 0x1f ) + 3;
+                        cpu->eatoms = ( c & 0x1f ) + 4;
                         cpu->instCount = cpu->eatoms;
                         cpu->disposition = ( 1 << ( cpu->eatoms ) ) - 1;
 
@@ -404,6 +409,8 @@ static bool _pumpAction( struct TRACEDecoderEngine *e, struct TRACECPUState *cpu
                         cpu->addr = j->q[match].addr;
                         retVal = TRACE_EV_MSG_RXED;
                         _stateChange( cpu, EV_CH_ADDRESS );
+                        _stackQ( j );
+                        j->q[0].addr = cpu->addr;
                         break;
 
                     case 0b10010101: /* Short address, IS0 short, Figure 6-32, Pg 6-294 */
@@ -685,7 +692,7 @@ static bool _pumpAction( struct TRACEDecoderEngine *e, struct TRACECPUState *cpu
                 }
                 else
                 {
-                    if ( j->idx == 8 )
+                    if ( j->idx == 9 )
                     {
                         /* Second byte of IS1 case - mask MSB */
                         j->q[0].addr = ( j->q[0].addr & ( ~( 0x7F << j->idx ) ) ) | ( ( c & 0x7f ) << ( j->idx ) );