transceivers: pull in power enable status fix #2009
Merged
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
This pulls in an update QSFP front IO FPGA at oxidecomputer/quartz@9209c85. This FPGA change makes it more clear if power is actually enabled to a module or not by splitting out the software power enable register from a hardware readback power enable register. In practice the FPGA gated on the enable bit being set and module presence, but that was not reflected in the
power_enable
field of module status. The only adjustment needed in the server is that we must write to the newQSFP_SW_POWER_ENx
registers instead of the oldQSFP_POWER_ENx
registers which are now read only.