Forgot to check that I added the STL

pc2 · Aug 29, 2024 · ca540e5 · ca540e5
1 parent ca75c53
commit ca540e5
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diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
@@ -20,9 +20,9 @@ jobs:
         submodules: recursive
     - name: Build
       # Don't try to build codegen, as it needs to link against LLVM
-      run: cargo build --verbose --features lsp
+      run: cargo build --verbose --all-features
     - name: Run tests
-      run: cargo test --verbose --features lsp
+      run: cargo test --verbose --all-features
 
   # check-fmt:
   #   runs-on: ubuntu-latest

diff --git a/README.md b/README.md
@@ -200,7 +200,7 @@ In this example, we create a memory block with a read port and a write port. Thi
 - [ ] Clock Domain Crossings
 - ~~[ ] Rhythm Syntax~~
 - [ ] Interface Generator Syntax
-- [ ] Standard Library Bundled with compiler
+- [x] Standard Library Bundled with compiler
 
 ### Performance, Linking and Name Resolution
 - [ ] Namespaces