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Sketch Hmac state machine #836
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by is_reg_addr and read/write_step_is_reg_addr, respectively, so that we can use word as the register type even though not all words are registers. Also generalize initial_state to is_initial_state.
after the done bit is detected, it is cleared by writing again 1 to it because it's rw1c, need to model this
jadephilipoom
approved these changes
Jun 22, 2021
so that comments are less prone to getting out of date
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This PR models the subset of the functionality of the Hmac module that is needed by the sha256 hmac code in silicon_creator.
I inferred this specification from the doc and from hmac.c.
I wanted to use
wordas the register type forStateMachineSemanticsinstead of a separateInductive Register, to avoid converting back and forth between them. This required some changes toStateMachineSemantics,StateMachineMMIO, andAesSemantics, so that the Hmac code can still benefit from the state-machine-agnostic compiler correctness proof inStateMachineMMIO.