hv: instr_emul: Correct handling of instruction length #8757
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The VM-exit instruction length(VMX_EXIT_INSTR_LEN) in VMCS is undefined on EPT violation, except during delivery of a software interrupt, privileged software exception, or software exception[1]. Although CPU is likely to set the field, it can be incorrect in certain cases, such as cmp+jcc and test+jcc. Since hypervisor does not know exactly how much bytes needed, and GVA translation is costly, it first copies at most 15 (VIE_INST_SIZE) bytes within the page, then decodes the instruction. If more bytes are needed during decoding and copied length is less than 15, it copies remaining bytes. [1] 29.2.5, https://cdrdv2-public.intel.com/671200/325462-sdm-vol-1-2abcd-3abcd.pdf Tracked-On: projectacrn#8756 Signed-off-by: Jiaqing Zhao <[email protected]>
jiaqingz-intel
requested review from
dongyaozu,
lifeix and
junjiemao1
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The VM-exit instruction length(VMX_EXIT_INSTR_LEN) in VMCS is undefined on EPT violation, except during delivery of a software interrupt, privileged software exception, or software exception[1]. Although CPU is likely to set the field, it can be incorrect in certain cases, such as cmp+jcc and test+jcc.
Since hypervisor does not know exactly how much bytes needed, and GVA translation is costly, it first copies at most 15 (VIE_INST_SIZE) bytes within the page, then decodes the instruction. If more bytes are needed during decoding and copied length is less than 15, it copies remaining bytes.
[1] 29.2.5, https://cdrdv2-public.intel.com/671200/325462-sdm-vol-1-2abcd-3abcd.pdf
Tracked-On: #8756