Bump Cheshire to include Culsans and TLB ECC protection#40

Open

ricted98 wants to merge 185 commits intoastralfrom rt/align

+21,220-877

Commits on Jul 2, 2024

Bump IPs (Cheshire, CVA6, ACE).
Yvan Tortorella
committed
Bump Cheshire for Culsans integration.
Yvan Tortorella
committed
Bump Cheshire and ACE to cut timing loop.
Yvan Tortorella
committed
Bump CVA6 and Cheshire tu include CLIC controller; change CVA6 config in bender-common.
Yvan Tortorella
committed

Commits on Jul 3, 2024

Bump technology commit.
Yvan Tortorella
committed

Commits on Aug 12, 2024

Bump nonfree to run tech cells simulation in CI.
Yvan Tortorella
committed
Bump nonfree to extend CI timeout.
Yvan Tortorella
committed
Bump nonfree to split I2C bootmode test from the others.
Yvan Tortorella
committed
Bump nonfree to try fix I2C boot.
Yvan Tortorella
committed
Update nonfree...
Yvan Tortorella
committed
Bump nonfree.
Yvan Tortorella
committed
Bump nonfree.
Yvan Tortorella
committed
Fixing regbus (a)synchronous parameters and rearranging connections.
Yvan Tortorella
committed
Add pulp-offload-intf.c to stimulate and test CVA6-PULP cluster interference (pulp-platform#262 )

luca-valente
authored and
Yvan Tortorella
committed
Fix configurable top level bugs and integrate CI flow. (#2 )

committed
Integrating and instantiating dummy fll and RTL padframe into carfield_synth_wrap

Your Name
authored and
Yvan Tortorella
committed
Fix indenting on fll_dummy.

Your Name
authored and
Yvan Tortorella
committed
Finalize integration of padframe and fll_dummy.

Your Name
authored and
Yvan Tortorella
committed
Finalizign integration of padframe in carfield_synth_wrap

Your Name
authored and
Yvan Tortorella
committed
Copied TB from Carfield's intel16 repo, updated Bender and simulation script

Victor Isachi
authored and
Yvan Tortorella
committed
Update README.md

VictorIsachi
authored and
Yvan Tortorella
committed
Added technology dependent simulation memory initialization define; Added behavioural padframe dependency to Bender

Victor Isachi
authored and
Yvan Tortorella
committed
Workaround to run the simulation without sdf error

Victor Isachi
authored and
Yvan Tortorella
committed
Bug Fixes; Included branch with the proper tech memory cuts; Updated Pad behavioural model; Added necessary package; Removed memory initialization in the TB

Victor Isachi
authored and
Yvan Tortorella
committed
Realigned with the astral branck TB: fixes, selective instantiation of spatz and safety island

Victor Isachi
authored and
Yvan Tortorella
committed
Updated the dummy FLL to generate the proper RT clock; minor fixes

Victor Isachi
authored and
Yvan Tortorella
committed
Changed the FLL model: now the proper gf12 behavioural model is used; Updated the TB accordingly. IMPORTANT: the FLL is slow (13.61MHz instead of the nominal 42MHz) and this causes issues with test…

Victor Isachi
authored and
Yvan Tortorella
committed
Added FLL wrapper with CDC register and address decoder; Added a test for the FLL

Victor Isachi
authored and
Yvan Tortorella
committed
Moved tech-dependent FLL to gitlab - updated flow; Fixes

Victor Isachi
authored and
Yvan Tortorella
committed
Refactored FLL test

Victor Isachi
authored and
Yvan Tortorella
committed
Updated the test to generate a 100MHz clock in normal mode with a regerence clock of 50MHz; Update with the new FLL wrapper interface

Victor Isachi
authored and
Yvan Tortorella
committed
Changed Cheshire's VIP baudrate to support 50MHz clock; Fixed dummy fll: works

Victor Isachi
authored and
Yvan Tortorella
committed
Added FLL bypass

Victor Isachi
authored and
Yvan Tortorella
committed
Updated the reference clock and test to 1MHz

Victor Isachi
authored and
Yvan Tortorella
committed
Implemented padframe

Victor Isachi
authored and
Yvan Tortorella
committed
Removed Padrick generated files (padframe) from lint list

Victor Isachi
authored and
Yvan Tortorella
committed
Added wrapper containing astral top, FLLs and padframe; Minor fixes/additions to the padframe

Victor Isachi
authored and
Yvan Tortorella
committed
Reworked TB and fixture to account for the new top and padframe; Made the TB configure the padframe based on the bootmode; Cleaned the file structure and Bender

Victor Isachi
authored and
Yvan Tortorella
committed
Updated FLL test to check all 4 clock domains (FLLs)

Victor Isachi
authored and
Yvan Tortorella
committed
Removed Packages from top-level wrapper

VictorIsachi
authored and
Yvan Tortorella
committed
Fixes and clean up (WIP)

Victor Isachi
authored and
Yvan Tortorella
committed
Fixes and clean up (WIP)

Victor Isachi
authored and
Yvan Tortorella
committed
Updated padframe to support SW configurable pull-up/-down for muxed pads; Fixes to simulation environment

Victor Isachi
authored and
Yvan Tortorella
committed
Padframe with the updated number of power pads and updated configuration to account for hyperbus constraints

Victor Isachi
authored and
Yvan Tortorella
committed
Updated padframe; updated FLL test (passes); simulation/tb fixes (works)

Victor Isachi
authored and
Yvan Tortorella
committed
Updated padframe with FLL clock pins

Victor Isachi
authored and
Yvan Tortorella
committed
Bump PULP cluster to integrate new iCache.
Yvan Tortorella
committed
Bump PULP cluster to fix iCache issues.

Yvan Tortorella
authored and
Yvan Tortorella
committed
ethernet island

chaoqun-liang
authored and
Yvan Tortorella
committed
add ethernet regs

chaoqun-liang
authored and
Yvan Tortorella
committed
multiple changes

chaoqun-liang
authored and
Yvan Tortorella
committed
multiple fixes

chaoqun-liang
authored and
Yvan Tortorella
committed
fix bender

chaoqun-liang
authored and
Yvan Tortorella
committed
trigger ci

chaoqun-liang
authored and
Yvan Tortorella
committed
rx irq ethernet

chaoqun-liang
authored and
Yvan Tortorella
committed
trigger ci

chaoqun-liang
authored and
Yvan Tortorella
committed
Bump ethernet and add working sw.

chaoqun-liang
authored and
Yvan Tortorella
committed
code clean up

chaoqun-liang
authored and
Yvan Tortorella
committed
Fix Spatz enabler in carfield.mk.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Add workaround to compile Streamer's IPs.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Add Streamer as a dependency.

Yvan Tortorella
authored and
Yvan Tortorella
committed
First transparent streamer integration.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Expand APB memory map.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Functional streamer integration (APB and RegBus access).

Yvan Tortorella
authored and
Yvan Tortorella
committed
Added proper streamer test. Wrong values read from register file.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Fix lint.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Bump streamer removing Master ID constraint on register interface.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Adapt Streamer test to readback all regs after writihg them.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Extend sim-clean rule removing *lib and *Lib generated by Streamer.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Add correct return value in PTME read back.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Add read from TC buffer and write to HPC LLC.

Yvan Tortorella
authored and
Yvan Tortorella
committed
WIP: Add PTME emulator.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Bump streamer commit and test.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Adjust L2 and Mailboxe sizes in config.
Yvan Tortorella
committed
Adjust bender URLs.
Yvan Tortorella
committed
Bump dependencies.
Yvan Tortorella
committed
PTME_EMULATOR is upper-case.
Yvan Tortorella
committed
bump streamer commit

andrea-caslini
authored and
Yvan Tortorella
committed
New hash for streamer repository

andrea-caslini
authored and
Yvan Tortorella
committed
tc interface added at tb top level and updated hash in bender.yml

andrea-caslini
authored and
Yvan Tortorella
committed
updated hash in bender.yml

andrea-caslini
authored and
Yvan Tortorella
committed
updated bender hash

andrea-caslini
authored and
Yvan Tortorella
committed
first issue of tb with tc

andrea-caslini
authored and
Yvan Tortorella
committed
updated streamer hash bender

andrea-caslini
authored and
Yvan Tortorella
committed
update bender.lock

andrea-caslini
authored and
Yvan Tortorella
committed
updated bender

mattiacosmi
authored and
Yvan Tortorella
committed
updated bender and tasi top level ports

mattiacosmi
authored and
Yvan Tortorella
committed
Add streamer-dedicated clock divider.
Yvan Tortorella
committed
Allow streamer test termination.
Yvan Tortorella
committed
added test cases for TASI module

mattiacosmi
authored and
Yvan Tortorella
committed
[Draft]: SpW integration.
Yvan Tortorella
committed
Fix typo in streamer test.
Yvan Tortorella
committed
Successful SpW integration.
Yvan Tortorella
committed
Connect streamer general interrupt to memory-mapped register.
Yvan Tortorella
committed
Fix error in streamer general interrupt connections.
Yvan Tortorella
committed
updated bender and interrupt mask register in tasi_interrupt_test

mattiacosmi
authored and
Yvan Tortorella
committed
added tests; added spw tb compact; added hpc/llc tb detection; bender updated

mattiacosmi
authored and
Yvan Tortorella
committed
bender updated

mattiacosmi
authored and
Yvan Tortorella
committed
Add APB demux on TMTC IP bus.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Use SSH to fetch SpW IP.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Optimize APB connections to Streamer and SpW.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Fix SpW ABP demux selector connection.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Bump Streamer and SpaceWire.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Bump SpaceWire to latest release.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Bump SpaceWire and Streamer.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Exclude tasi files from lint.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Fetch Thales IPs using SSH.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Set SPATZD to 0.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Fix number of APB slaves.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Move eth_clk scope.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Introduce ethernet config.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Bump streamer.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Commit updated config.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Bump Streamer and Spacewire for DC synthesis sypport.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Bump tech commit.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Update streamer.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Bump tech commit.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Bump streamer.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Enlarge L2 and LLC sizes.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Reduce LLC size.

Yvan Tortorella
authored and
Yvan Tortorella
committed
Bump tech commit.
Yvan Tortorella
committed
Connect Streamer and SpaceWire pins to padframe.
Yvan Tortorella
committed
Update tech-commit.
Yvan Tortorella
committed
Remove carfield_synth_wrap from Bender manifest.
Yvan Tortorella
committed
Fix connection PTME external clock connection.
Yvan Tortorella
committed
Fix SpW connections (there is an error in the pad structure strobe).
Yvan Tortorella
committed
Insert AXI cut right after CVA6.
Yvan Tortorella
committed
Update tech commit.
Yvan Tortorella
committed
Bump SpaceWire and Streamer.
Yvan Tortorella
committed
Changed PADTIE direction (from H to V); Updated number of power pins (IO V from 6 to 10); Fixed name of spw strb; Updated astral_wrap

Victor Isachi
authored and
Yvan Tortorella
committed
Changed order of pads to reflect specification

Victor Isachi
authored and
Yvan Tortorella
committed
Fix simulation. Now starting but still not functional.

maicolciani
authored and
Yvan Tortorella
committed
Updated TB's and FLL's test address maps

Victor Isachi
authored and
Yvan Tortorella
committed
Fix nonfree commit.
Yvan Tortorella
committed
Delete DMA wrap files.
Yvan Tortorella
committed
Fix verilog lint.
Yvan Tortorella
committed
Remove tc_clk.sv in tech simulation.
Yvan Tortorella
committed
Bump tech commit.
Yvan Tortorella
committed

Commits on Aug 13, 2024

Automatize padrame generation.
Yvan Tortorella
committed

Commits on Aug 14, 2024

Update tech.
Yvan Tortorella
committed
Reduce L2 size.
Yvan Tortorella
committed
Update padframe for a 5 mm2 chip.
Yvan Tortorella
committed

Commits on Aug 16, 2024

Commits on Aug 17, 2024

Bump tech-commit.
Yvan Tortorella
committed
Fix address map.
Yvan Tortorella
committed
Allign register map. Simulation works again.
Yvan Tortorella
committed

Commits on Aug 18, 2024

Fix errors in address map.
Yvan Tortorella
committed
Configure padframe for serial link only if serial link preload mode is selected.
Yvan Tortorella
committed
Properly drive fll_bypass signal in testbench.
Yvan Tortorella
committed
Allow FLL bypass at comand line.
Yvan Tortorella
committed

Commits on Aug 19, 2024

Allow FLLs/PLLs to be bypassed in each testbench.
Yvan Tortorella
committed
Adjust ethernet region in VIP.
Yvan Tortorella
committed

Commits on Aug 23, 2024

Add secure domain bootmode pad.
Yvan Tortorella
committed
Parametrize number of FLLs and add secure domain dedicate clock source.
Yvan Tortorella
committed
Fix lint.
Yvan Tortorella
committed

Commits on Aug 25, 2024

Bump tech commit.
Yvan Tortorella
committed

Commits on Aug 27, 2024

Commits on Aug 28, 2024

Bump cheshire
ricted98
committed

Commits on Aug 29, 2024

Added FLL and Padframe drivers; Updated FLL test to use the driver; Fixed FLL propagation to SECD/RT clocks (#44 )

VictorIsachi
and
Victor Isachi
authored

Commits on Aug 30, 2024

Updated reference to debugged FLL wrapper (#46 )

VictorIsachi
and
Victor Isachi
authored
Minor fixes to package and registers (#47 )
LuigiGhionda
authored
Use base addresses defined in carfield_params.h for drivers.
Yvan Tortorella
committed
Restore set_bypass_pll task and pass BYPASS_PLL param to start script.
Yvan Tortorella
committed

Commits on Aug 31, 2024

Adjust TB to fix PULP tests.
Yvan Tortorella
committed
Reordering PULP cluster testbench more logically.
Yvan Tortorella
committed
Better use testbench functions.
Yvan Tortorella
committed
Add pullup nets for I2C and SPI buses.
Yvan Tortorella
committed

Commits on Sep 1, 2024

Bump tech.
Yvan Tortorella
committed
Rework system timer test.
Yvan Tortorella
committed
Add Streamer and SpW to all configs.
Yvan Tortorella
committed
Connect Streamer and SpaceWire to padframe.
Yvan Tortorella
committed

Commits on Sep 2, 2024

Fixed minor bug with padframe driver
Victor Isachi
committed
Implemented pad muxing and FLL configuration in ethernet test; Improved readability of memory map (#48 )

VictorIsachi
and
Victor Isachi
authored

Commits on Sep 3, 2024

Fix OpenTitan tests. (#49 )

authored
Move scope of padframe and FLL drivers.
Yvan Tortorella
committed
Fix typo in fixture.
Yvan Tortorella
committed
Adapt FLL driver.
Yvan Tortorella
committed

Commits on Sep 4, 2024

Merge remote-tracking branch 'origin/yt/thales-tapeout' into rt/align
ricted98
committed