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Fix rebase
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sermazz committed Jan 28, 2025
1 parent 1ac1f80 commit d14274c
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Showing 4 changed files with 12 additions and 18 deletions.
1 change: 1 addition & 0 deletions .gitignore
Original file line number Diff line number Diff line change
Expand Up @@ -36,6 +36,7 @@ target/sim/models
target/sim/vsim/work
target/sim/vsim/transcript
target/sim/vsim/*.do
target/sim/vsim/*.log
target/sim/vsim/trace*
modelsim.ini
compile.tcl
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2 changes: 0 additions & 2 deletions bender.mk
Original file line number Diff line number Diff line change
Expand Up @@ -10,5 +10,3 @@ COMMON_TARGS ?=
COMMON_TARGS += -t pulp_cluster -t cv32a6_convolve -t cva6 -t rtl

SIM_TARGS = $(COMMON_TARGS) -t test -t sim

VLOG_ARGS += \"+incdir+$(CHIM_ROOT)/hw/include\"
13 changes: 4 additions & 9 deletions target/sim/sim.mk
Original file line number Diff line number Diff line change
Expand Up @@ -14,7 +14,7 @@ CHIM_SIM_DIR ?= $(CHIM_ROOT)/target/sim
.PHONY: chim-sim
chim-sim: chim-hyperram-model $(CHIM_SIM_DIR)/vsim/compile.tcl

# Get HyperRAM verification IP (VIP) for simulation
# HyperRAM verification IP (VIP) for simulation
.PHONY: chim-hyperram-model
chim-hyperram-model: $(CHIM_SIM_DIR)/models/s27ks0641/s27ks0641.sv
$(CHIM_SIM_DIR)/models/s27ks0641/s27ks0641.sv:
Expand All @@ -25,8 +25,9 @@ $(CHIM_SIM_DIR)/models/s27ks0641/s27ks0641.sv:
HYP_USER_PRELOAD ?= 0
HYP0_PRELOAD_MEM_FILE ?= ""


# vsim compilation arguments (options, macros)
CHIM_VLOG_ARGS += -suppress 2583 -suppress 13314
CHIM_VLOG_ARGS += \"+incdir+$(CHIM_ROOT)/hw/include\"
CHIM_VLOG_ARGS += +define+HYP_USER_PRELOAD="$(HYP_USER_PRELOAD)"
CHIM_VLOG_ARGS += +define+HYP0_PRELOAD_MEM_FILE=\"$(HYP0_PRELOAD_MEM_FILE)\"
# this path should be kept relative to the vsim directory to avoid CI issues:
Expand All @@ -35,7 +36,7 @@ CHIM_VLOG_ARGS += +define+PATH_TO_HYP_SDF=\"../models/s27ks0641/s27ks0641.sdf\"

# Generate vsim compilation script
$(CHIM_SIM_DIR)/vsim/compile.tcl: chs-hw-init snitch-hw-init
@bender script vsim $(SIM_TARGS) --vlog-arg="$(CHIM_VLOG_ARGS)" > $@
bender script vsim $(SIM_TARGS) --vlog-arg="$(CHIM_VLOG_ARGS)" > $@
echo 'vlog "$(realpath $(CHS_ROOT))/target/sim/src/elfloader.cpp" -ccflags "-std=c++11"' >> $@

# Clean
Expand All @@ -45,10 +46,4 @@ chim-sim-clean:
@rm -rf $(CHIM_SIM_DIR)/vsim/transcript
@rm -f $(CHIM_SIM_DIR)/vsim/compile.tcl

chim-sim: $(CHIM_SIM_DIR)/vsim/compile.tcl

$(CHIM_SIM_DIR)/vsim/compile.tcl: chs-hw-init snitch-hw-init pulp-sw-init
@bender script vsim $(COMMON_TARGS) $(SIM_TARGS) --vlog-arg="$(VLOG_ARGS)"> $@
echo 'vlog "$(realpath $(CHS_ROOT))/target/sim/src/elfloader.cpp" -ccflags "-std=c++11"' >> $@

endif # chim_sim_mk
14 changes: 7 additions & 7 deletions target/sim/src/tb_chimera_soc.sv
Original file line number Diff line number Diff line change
Expand Up @@ -106,13 +106,6 @@ module tb_chimera_soc
0: begin // JTAG
fix.vip.jtag_init();
fix.vip.jtag_elf_run(preload_elf);

fix.dut.i_cluster_domain.gen_clusters[0].i_chimera_cluster.boot_cluster();
fix.dut.i_cluster_domain.gen_clusters[1].i_chimera_cluster.boot_cluster();
fix.dut.i_cluster_domain.gen_clusters[2].i_chimera_cluster.boot_cluster();
fix.dut.i_cluster_domain.gen_clusters[3].i_chimera_cluster.boot_cluster();
fix.dut.i_cluster_domain.gen_clusters[4].i_chimera_cluster.boot_cluster();

fix.vip.jtag_wait_for_eoc(exit_code);
end
2: begin // UART
Expand All @@ -127,6 +120,13 @@ module tb_chimera_soc
fast_elf_preload(preload_elf);
// Unhalt the core
fix.vip.jtag_resume_hart();

fix.dut.i_cluster_domain.gen_clusters[0].i_chimera_cluster.boot_cluster();
fix.dut.i_cluster_domain.gen_clusters[1].i_chimera_cluster.boot_cluster();
fix.dut.i_cluster_domain.gen_clusters[2].i_chimera_cluster.boot_cluster();
fix.dut.i_cluster_domain.gen_clusters[3].i_chimera_cluster.boot_cluster();
fix.dut.i_cluster_domain.gen_clusters[4].i_chimera_cluster.boot_cluster();

// Wait for the end of computation
fix.vip.jtag_wait_for_eoc(exit_code);
end
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