src/target/riscv: error out of the examine() in case abits is zero
#1238
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The spec requires `abits` to be no less then 7 ( [3.1. Debug Module Interface (DMI)]): > The DMI uses between 7 and 32 address bits Commit a450a7d ("Fix data types around batch.{c,h}") introduced a check that issues a warning if `abits` is less then 7. The reason it's a warning and not an error -- on Spike `abits` is 6. However, if the examination is to proceed when `abits` is zero, an assert in `get_dmi_scan_length()` will trigger when attempting to communicate over DMI. Link: https://github.com/JanMatCodasip/riscv-openocd/blob/a450a7d4966a19c48b2543810f5b8370af6383e5/src/target/riscv/batch.c#L25 It's impossible to communicate over DMI with `abits == 0`, so an error is returned instead of a warning in this case. Change-Id: Ice4622adccfc8304b37bc678253cc19d8ac1457e Signed-off-by: Evgeniy Naydanov <[email protected]>
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@JanMatCodasip, please take a look at this one when you have the time. It's related to #1202 |
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The spec requires
abitsto be no less then 7 ( [3.1. Debug Module Interface (DMI)]):Commit a450a7d ("Fix data types around batch.{c,h}") introduced a check that issues a warning if
abitsis less then 7. The reason it's a warning and not an error -- on Spikeabitsis 6.However, if the examination is to proceed when
abitsis zero, an assert inget_dmi_scan_length()will trigger when attempting to communicate over DMI.Link: https://github.com/JanMatCodasip/riscv-openocd/blob/a450a7d4966a19c48b2543810f5b8370af6383e5/src/target/riscv/batch.c#L25
It's impossible to communicate over DMI with
abits == 0, so an error is returned instead of a warning in this case.Change-Id: Ice4622adccfc8304b37bc678253cc19d8ac1457e