[Auto-gen] Update vector crypto tests under ../auto-generated. (make …

…git-commit-autogen-vector-crypto-test)
riscv-non-isa · Sep 10, 2024 · 90f9957 · 90f9957
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commit 90f9957
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diff --git a/auto-generated/vector-crypto/llvm-api-tests/vaesdf.c b/auto-generated/vector-crypto/llvm-api-tests/vaesdf.c
@@ -1,12 +1,9 @@
 // REQUIRES: riscv-registered-target
-// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zvl512b \
-// RUN:   -target-feature +zvbb \
-// RUN:   -target-feature +zvbc \
-// RUN:   -target-feature +zvkg \
+// RUN: %clang_cc1 -triple riscv64 -disable-O0-optnone \
+// RUN:   -target-feature +zve64x \
 // RUN:   -target-feature +zvkned \
-// RUN:   -target-feature +zvknhb \
-// RUN:   -target-feature +zvksed \
-// RUN:   -target-feature +zvksh -disable-O0-optnone \
+// RUN:   -target-feature +zvl256b \
+// RUN:   -target-feature +experimental \
 // RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
 // RUN:   FileCheck --check-prefix=CHECK-RV64 %s
 

diff --git a/auto-generated/vector-crypto/llvm-api-tests/vaesdm.c b/auto-generated/vector-crypto/llvm-api-tests/vaesdm.c
@@ -1,12 +1,9 @@
 // REQUIRES: riscv-registered-target
-// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zvl512b \
-// RUN:   -target-feature +zvbb \
-// RUN:   -target-feature +zvbc \
-// RUN:   -target-feature +zvkg \
+// RUN: %clang_cc1 -triple riscv64 -disable-O0-optnone \
+// RUN:   -target-feature +zve64x \
 // RUN:   -target-feature +zvkned \
-// RUN:   -target-feature +zvknhb \
-// RUN:   -target-feature +zvksed \
-// RUN:   -target-feature +zvksh -disable-O0-optnone \
+// RUN:   -target-feature +zvl256b \
+// RUN:   -target-feature +experimental \
 // RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
 // RUN:   FileCheck --check-prefix=CHECK-RV64 %s
 

diff --git a/auto-generated/vector-crypto/llvm-api-tests/vaesef.c b/auto-generated/vector-crypto/llvm-api-tests/vaesef.c
@@ -1,12 +1,9 @@
 // REQUIRES: riscv-registered-target
-// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zvl512b \
-// RUN:   -target-feature +zvbb \
-// RUN:   -target-feature +zvbc \
-// RUN:   -target-feature +zvkg \
+// RUN: %clang_cc1 -triple riscv64 -disable-O0-optnone \
+// RUN:   -target-feature +zve64x \
 // RUN:   -target-feature +zvkned \
-// RUN:   -target-feature +zvknhb \
-// RUN:   -target-feature +zvksed \
-// RUN:   -target-feature +zvksh -disable-O0-optnone \
+// RUN:   -target-feature +zvl256b \
+// RUN:   -target-feature +experimental \
 // RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
 // RUN:   FileCheck --check-prefix=CHECK-RV64 %s
 

diff --git a/auto-generated/vector-crypto/llvm-api-tests/vaesem.c b/auto-generated/vector-crypto/llvm-api-tests/vaesem.c
@@ -1,12 +1,9 @@
 // REQUIRES: riscv-registered-target
-// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zvl512b \
-// RUN:   -target-feature +zvbb \
-// RUN:   -target-feature +zvbc \
-// RUN:   -target-feature +zvkg \
+// RUN: %clang_cc1 -triple riscv64 -disable-O0-optnone \
+// RUN:   -target-feature +zve64x \
 // RUN:   -target-feature +zvkned \
-// RUN:   -target-feature +zvknhb \
-// RUN:   -target-feature +zvksed \
-// RUN:   -target-feature +zvksh -disable-O0-optnone \
+// RUN:   -target-feature +zvl256b \
+// RUN:   -target-feature +experimental \
 // RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
 // RUN:   FileCheck --check-prefix=CHECK-RV64 %s
 

diff --git a/auto-generated/vector-crypto/llvm-api-tests/vaeskf1.c b/auto-generated/vector-crypto/llvm-api-tests/vaeskf1.c
@@ -1,12 +1,9 @@
 // REQUIRES: riscv-registered-target
-// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zvl512b \
-// RUN:   -target-feature +zvbb \
-// RUN:   -target-feature +zvbc \
-// RUN:   -target-feature +zvkg \
+// RUN: %clang_cc1 -triple riscv64 -disable-O0-optnone \
+// RUN:   -target-feature +zve64x \
 // RUN:   -target-feature +zvkned \
-// RUN:   -target-feature +zvknhb \
-// RUN:   -target-feature +zvksed \
-// RUN:   -target-feature +zvksh -disable-O0-optnone \
+// RUN:   -target-feature +zvl256b \
+// RUN:   -target-feature +experimental \
 // RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
 // RUN:   FileCheck --check-prefix=CHECK-RV64 %s
 

diff --git a/auto-generated/vector-crypto/llvm-api-tests/vaeskf2.c b/auto-generated/vector-crypto/llvm-api-tests/vaeskf2.c
@@ -1,12 +1,9 @@
 // REQUIRES: riscv-registered-target
-// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zvl512b \
-// RUN:   -target-feature +zvbb \
-// RUN:   -target-feature +zvbc \
-// RUN:   -target-feature +zvkg \
+// RUN: %clang_cc1 -triple riscv64 -disable-O0-optnone \
+// RUN:   -target-feature +zve64x \
 // RUN:   -target-feature +zvkned \
-// RUN:   -target-feature +zvknhb \
-// RUN:   -target-feature +zvksed \
-// RUN:   -target-feature +zvksh -disable-O0-optnone \
+// RUN:   -target-feature +zvl256b \
+// RUN:   -target-feature +experimental \
 // RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
 // RUN:   FileCheck --check-prefix=CHECK-RV64 %s
 

diff --git a/auto-generated/vector-crypto/llvm-api-tests/vaesz.c b/auto-generated/vector-crypto/llvm-api-tests/vaesz.c
@@ -1,12 +1,9 @@
 // REQUIRES: riscv-registered-target
-// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zvl512b \
-// RUN:   -target-feature +zvbb \
-// RUN:   -target-feature +zvbc \
-// RUN:   -target-feature +zvkg \
+// RUN: %clang_cc1 -triple riscv64 -disable-O0-optnone \
+// RUN:   -target-feature +zve64x \
 // RUN:   -target-feature +zvkned \
-// RUN:   -target-feature +zvknhb \
-// RUN:   -target-feature +zvksed \
-// RUN:   -target-feature +zvksh -disable-O0-optnone \
+// RUN:   -target-feature +zvl256b \
+// RUN:   -target-feature +experimental \
 // RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
 // RUN:   FileCheck --check-prefix=CHECK-RV64 %s
 

diff --git a/auto-generated/vector-crypto/llvm-api-tests/vandn.c b/auto-generated/vector-crypto/llvm-api-tests/vandn.c
@@ -1,12 +1,8 @@
 // REQUIRES: riscv-registered-target
-// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zvl512b \
+// RUN: %clang_cc1 -triple riscv64 -disable-O0-optnone \
 // RUN:   -target-feature +zvbb \
-// RUN:   -target-feature +zvbc \
-// RUN:   -target-feature +zvkg \
-// RUN:   -target-feature +zvkned \
-// RUN:   -target-feature +zvknhb \
-// RUN:   -target-feature +zvksed \
-// RUN:   -target-feature +zvksh -disable-O0-optnone \
+// RUN:   -target-feature +zve64x \
+// RUN:   -target-feature +experimental \
 // RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
 // RUN:   FileCheck --check-prefix=CHECK-RV64 %s
 

diff --git a/auto-generated/vector-crypto/llvm-api-tests/vbrev.c b/auto-generated/vector-crypto/llvm-api-tests/vbrev.c
@@ -1,12 +1,8 @@
 // REQUIRES: riscv-registered-target
-// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zvl512b \
+// RUN: %clang_cc1 -triple riscv64 -disable-O0-optnone \
 // RUN:   -target-feature +zvbb \
-// RUN:   -target-feature +zvbc \
-// RUN:   -target-feature +zvkg \
-// RUN:   -target-feature +zvkned \
-// RUN:   -target-feature +zvknhb \
-// RUN:   -target-feature +zvksed \
-// RUN:   -target-feature +zvksh -disable-O0-optnone \
+// RUN:   -target-feature +zve64x \
+// RUN:   -target-feature +experimental \
 // RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
 // RUN:   FileCheck --check-prefix=CHECK-RV64 %s
 

diff --git a/auto-generated/vector-crypto/llvm-api-tests/vbrev8.c b/auto-generated/vector-crypto/llvm-api-tests/vbrev8.c
@@ -1,12 +1,8 @@
 // REQUIRES: riscv-registered-target
-// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zvl512b \
+// RUN: %clang_cc1 -triple riscv64 -disable-O0-optnone \
 // RUN:   -target-feature +zvbb \
-// RUN:   -target-feature +zvbc \
-// RUN:   -target-feature +zvkg \
-// RUN:   -target-feature +zvkned \
-// RUN:   -target-feature +zvknhb \
-// RUN:   -target-feature +zvksed \
-// RUN:   -target-feature +zvksh -disable-O0-optnone \
+// RUN:   -target-feature +zve64x \
+// RUN:   -target-feature +experimental \
 // RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
 // RUN:   FileCheck --check-prefix=CHECK-RV64 %s
 

diff --git a/auto-generated/vector-crypto/llvm-api-tests/vclmul.c b/auto-generated/vector-crypto/llvm-api-tests/vclmul.c
@@ -1,12 +1,8 @@
 // REQUIRES: riscv-registered-target
-// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zvl512b \
-// RUN:   -target-feature +zvbb \
+// RUN: %clang_cc1 -triple riscv64 -disable-O0-optnone \
 // RUN:   -target-feature +zvbc \
-// RUN:   -target-feature +zvkg \
-// RUN:   -target-feature +zvkned \
-// RUN:   -target-feature +zvknhb \
-// RUN:   -target-feature +zvksed \
-// RUN:   -target-feature +zvksh -disable-O0-optnone \
+// RUN:   -target-feature +zve64x \
+// RUN:   -target-feature +experimental \
 // RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
 // RUN:   FileCheck --check-prefix=CHECK-RV64 %s
 

diff --git a/auto-generated/vector-crypto/llvm-api-tests/vclmulh.c b/auto-generated/vector-crypto/llvm-api-tests/vclmulh.c
@@ -1,12 +1,8 @@
 // REQUIRES: riscv-registered-target
-// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zvl512b \
-// RUN:   -target-feature +zvbb \
+// RUN: %clang_cc1 -triple riscv64 -disable-O0-optnone \
 // RUN:   -target-feature +zvbc \
-// RUN:   -target-feature +zvkg \
-// RUN:   -target-feature +zvkned \
-// RUN:   -target-feature +zvknhb \
-// RUN:   -target-feature +zvksed \
-// RUN:   -target-feature +zvksh -disable-O0-optnone \
+// RUN:   -target-feature +zve64x \
+// RUN:   -target-feature +experimental \
 // RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
 // RUN:   FileCheck --check-prefix=CHECK-RV64 %s
 

diff --git a/auto-generated/vector-crypto/llvm-api-tests/vclz.c b/auto-generated/vector-crypto/llvm-api-tests/vclz.c
@@ -1,12 +1,8 @@
 // REQUIRES: riscv-registered-target
-// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zvl512b \
+// RUN: %clang_cc1 -triple riscv64 -disable-O0-optnone \
 // RUN:   -target-feature +zvbb \
-// RUN:   -target-feature +zvbc \
-// RUN:   -target-feature +zvkg \
-// RUN:   -target-feature +zvkned \
-// RUN:   -target-feature +zvknhb \
-// RUN:   -target-feature +zvksed \
-// RUN:   -target-feature +zvksh -disable-O0-optnone \
+// RUN:   -target-feature +zve64x \
+// RUN:   -target-feature +experimental \
 // RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
 // RUN:   FileCheck --check-prefix=CHECK-RV64 %s
 

diff --git a/auto-generated/vector-crypto/llvm-api-tests/vcpop.c b/auto-generated/vector-crypto/llvm-api-tests/vcpop.c
@@ -1,5 +1,8 @@
 // REQUIRES: riscv-registered-target
-// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
+// RUN: %clang_cc1 -triple riscv64 -disable-O0-optnone \
+// RUN:   -target-feature +zvbb \
+// RUN:   -target-feature +zve64x \
+// RUN:   -target-feature +experimental \
 // RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
 // RUN:   FileCheck --check-prefix=CHECK-RV64 %s
 

diff --git a/auto-generated/vector-crypto/llvm-api-tests/vctz.c b/auto-generated/vector-crypto/llvm-api-tests/vctz.c
@@ -1,12 +1,8 @@
 // REQUIRES: riscv-registered-target
-// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zvl512b \
+// RUN: %clang_cc1 -triple riscv64 -disable-O0-optnone \
 // RUN:   -target-feature +zvbb \
-// RUN:   -target-feature +zvbc \
-// RUN:   -target-feature +zvkg \
-// RUN:   -target-feature +zvkned \
-// RUN:   -target-feature +zvknhb \
-// RUN:   -target-feature +zvksed \
-// RUN:   -target-feature +zvksh -disable-O0-optnone \
+// RUN:   -target-feature +zve64x \
+// RUN:   -target-feature +experimental \
 // RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
 // RUN:   FileCheck --check-prefix=CHECK-RV64 %s
 

diff --git a/auto-generated/vector-crypto/llvm-api-tests/vghsh.c b/auto-generated/vector-crypto/llvm-api-tests/vghsh.c
@@ -1,12 +1,9 @@
 // REQUIRES: riscv-registered-target
-// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zvl512b \
-// RUN:   -target-feature +zvbb \
-// RUN:   -target-feature +zvbc \
+// RUN: %clang_cc1 -triple riscv64 -disable-O0-optnone \
+// RUN:   -target-feature +zve64x \
 // RUN:   -target-feature +zvkg \
-// RUN:   -target-feature +zvkned \
-// RUN:   -target-feature +zvknhb \
-// RUN:   -target-feature +zvksed \
-// RUN:   -target-feature +zvksh -disable-O0-optnone \
+// RUN:   -target-feature +zvl256b \
+// RUN:   -target-feature +experimental \
 // RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
 // RUN:   FileCheck --check-prefix=CHECK-RV64 %s
 

diff --git a/auto-generated/vector-crypto/llvm-api-tests/vgmul.c b/auto-generated/vector-crypto/llvm-api-tests/vgmul.c
@@ -1,12 +1,9 @@
 // REQUIRES: riscv-registered-target
-// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zvl512b \
-// RUN:   -target-feature +zvbb \
-// RUN:   -target-feature +zvbc \
+// RUN: %clang_cc1 -triple riscv64 -disable-O0-optnone \
+// RUN:   -target-feature +zve64x \
 // RUN:   -target-feature +zvkg \
-// RUN:   -target-feature +zvkned \
-// RUN:   -target-feature +zvknhb \
-// RUN:   -target-feature +zvksed \
-// RUN:   -target-feature +zvksh -disable-O0-optnone \
+// RUN:   -target-feature +zvl256b \
+// RUN:   -target-feature +experimental \
 // RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
 // RUN:   FileCheck --check-prefix=CHECK-RV64 %s
 

diff --git a/auto-generated/vector-crypto/llvm-api-tests/vrev8.c b/auto-generated/vector-crypto/llvm-api-tests/vrev8.c
@@ -1,12 +1,8 @@
 // REQUIRES: riscv-registered-target
-// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zvl512b \
+// RUN: %clang_cc1 -triple riscv64 -disable-O0-optnone \
 // RUN:   -target-feature +zvbb \
-// RUN:   -target-feature +zvbc \
-// RUN:   -target-feature +zvkg \
-// RUN:   -target-feature +zvkned \
-// RUN:   -target-feature +zvknhb \
-// RUN:   -target-feature +zvksed \
-// RUN:   -target-feature +zvksh -disable-O0-optnone \
+// RUN:   -target-feature +zve64x \
+// RUN:   -target-feature +experimental \
 // RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
 // RUN:   FileCheck --check-prefix=CHECK-RV64 %s
 

diff --git a/auto-generated/vector-crypto/llvm-api-tests/vrol.c b/auto-generated/vector-crypto/llvm-api-tests/vrol.c
@@ -1,12 +1,8 @@
 // REQUIRES: riscv-registered-target
-// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zvl512b \
-// RUN:   -target-feature +zvbb \
-// RUN:   -target-feature +zvbc \
-// RUN:   -target-feature +zvkg \
-// RUN:   -target-feature +zvkned \
-// RUN:   -target-feature +zvknhb \
-// RUN:   -target-feature +zvksed \
-// RUN:   -target-feature +zvksh -disable-O0-optnone \
+// RUN: %clang_cc1 -triple riscv64 -disable-O0-optnone \
+// RUN:   -target-feature +zve64x \
+// RUN:   -target-feature +zvkb \
+// RUN:   -target-feature +experimental \
 // RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
 // RUN:   FileCheck --check-prefix=CHECK-RV64 %s
 

diff --git a/auto-generated/vector-crypto/llvm-api-tests/vror.c b/auto-generated/vector-crypto/llvm-api-tests/vror.c
@@ -1,12 +1,8 @@
 // REQUIRES: riscv-registered-target
-// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zvl512b \
-// RUN:   -target-feature +zvbb \
-// RUN:   -target-feature +zvbc \
-// RUN:   -target-feature +zvkg \
-// RUN:   -target-feature +zvkned \
-// RUN:   -target-feature +zvknhb \
-// RUN:   -target-feature +zvksed \
-// RUN:   -target-feature +zvksh -disable-O0-optnone \
+// RUN: %clang_cc1 -triple riscv64 -disable-O0-optnone \
+// RUN:   -target-feature +zve64x \
+// RUN:   -target-feature +zvkb \
+// RUN:   -target-feature +experimental \
 // RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
 // RUN:   FileCheck --check-prefix=CHECK-RV64 %s
 

diff --git a/auto-generated/vector-crypto/llvm-api-tests/vsha2ch.c b/auto-generated/vector-crypto/llvm-api-tests/vsha2ch.c
@@ -1,12 +1,9 @@
 // REQUIRES: riscv-registered-target
-// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zvl512b \
-// RUN:   -target-feature +zvbb \
-// RUN:   -target-feature +zvbc \
-// RUN:   -target-feature +zvkg \
-// RUN:   -target-feature +zvkned \
+// RUN: %clang_cc1 -triple riscv64 -disable-O0-optnone \
+// RUN:   -target-feature +zve64x \
 // RUN:   -target-feature +zvknhb \
-// RUN:   -target-feature +zvksed \
-// RUN:   -target-feature +zvksh -disable-O0-optnone \
+// RUN:   -target-feature +zvl256b \
+// RUN:   -target-feature +experimental \
 // RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
 // RUN:   FileCheck --check-prefix=CHECK-RV64 %s
 

diff --git a/auto-generated/vector-crypto/llvm-api-tests/vsha2cl.c b/auto-generated/vector-crypto/llvm-api-tests/vsha2cl.c
@@ -1,12 +1,9 @@
 // REQUIRES: riscv-registered-target
-// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zvl512b \
-// RUN:   -target-feature +zvbb \
-// RUN:   -target-feature +zvbc \
-// RUN:   -target-feature +zvkg \
-// RUN:   -target-feature +zvkned \
+// RUN: %clang_cc1 -triple riscv64 -disable-O0-optnone \
+// RUN:   -target-feature +zve64x \
 // RUN:   -target-feature +zvknhb \
-// RUN:   -target-feature +zvksed \
-// RUN:   -target-feature +zvksh -disable-O0-optnone \
+// RUN:   -target-feature +zvl256b \
+// RUN:   -target-feature +experimental \
 // RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
 // RUN:   FileCheck --check-prefix=CHECK-RV64 %s
 

diff --git a/auto-generated/vector-crypto/llvm-api-tests/vsha2ms.c b/auto-generated/vector-crypto/llvm-api-tests/vsha2ms.c
@@ -1,12 +1,9 @@
 // REQUIRES: riscv-registered-target
-// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zvl512b \
-// RUN:   -target-feature +zvbb \
-// RUN:   -target-feature +zvbc \
-// RUN:   -target-feature +zvkg \
-// RUN:   -target-feature +zvkned \
+// RUN: %clang_cc1 -triple riscv64 -disable-O0-optnone \
+// RUN:   -target-feature +zve64x \
 // RUN:   -target-feature +zvknhb \
-// RUN:   -target-feature +zvksed \
-// RUN:   -target-feature +zvksh -disable-O0-optnone \
+// RUN:   -target-feature +zvl256b \
+// RUN:   -target-feature +experimental \
 // RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
 // RUN:   FileCheck --check-prefix=CHECK-RV64 %s
 

diff --git a/auto-generated/vector-crypto/llvm-api-tests/vsm3c.c b/auto-generated/vector-crypto/llvm-api-tests/vsm3c.c
@@ -1,12 +1,9 @@
 // REQUIRES: riscv-registered-target
-// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zvl512b \
-// RUN:   -target-feature +zvbb \
-// RUN:   -target-feature +zvbc \
-// RUN:   -target-feature +zvkg \
-// RUN:   -target-feature +zvkned \
-// RUN:   -target-feature +zvknhb \
-// RUN:   -target-feature +zvksed \
-// RUN:   -target-feature +zvksh -disable-O0-optnone \
+// RUN: %clang_cc1 -triple riscv64 -disable-O0-optnone \
+// RUN:   -target-feature +zve64x \
+// RUN:   -target-feature +zvksh \
+// RUN:   -target-feature +zvl512b \
+// RUN:   -target-feature +experimental \
 // RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
 // RUN:   FileCheck --check-prefix=CHECK-RV64 %s