Feature/asm cpu desc #4847
Feature/asm cpu desc #4847
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well-mannered-goat
requested review from
wargio,
kazarmy,
thestr4ng3r,
ret2libc and
Rot127
as code owners
librz/arch/p/asm/asm_mips_cs.c
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| "noptr64", "NoPtr64: MIPS configuration without support for 64-bit pointers, targeting specific use cases.", | ||
| "nofloat", "NoFloat: MIPS configuration without floating-point unit, designed for cost-sensitive applications.", |
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| "noptr64", "NoPtr64: MIPS configuration without support for 64-bit pointers, targeting specific use cases.", | |
| "nofloat", "NoFloat: MIPS configuration without floating-point unit, designed for cost-sensitive applications.", | |
| "noptr64", "Special MIPS configuration to disable support for 64-bit pointers.", | |
| "nofloat", "Special MIPS configuration to disable support for floating-points.", |
librz/arch/p/asm/asm_pic.c
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| "highend", "High-End: Advanced microcontroller family with rich features and high processing capabilities.", | ||
| "midrange", "Mid-Range: Microcontroller family designed for moderate complexity applications with cost-effectiveness.", | ||
| "baseline", "Baseline: Entry-level microcontroller family with minimal features for basic applications.", |
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this looks wrong, these are aliases.
baseline is pic14, midrange is pic16 and highend is pic18
librz/arch/p/asm/asm_ppc_cs.c
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| @@ -116,6 +116,17 @@ static int ppc_disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len) { | |||
| return op->size; | |||
| } | |||
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| char **ppc_cpu_descriptions() { | |||
| static char *cpu_desc[] = { | |||
| "ppc", "PowerPC: High-performance RISC architecture used in embedded systems, servers, and workstations.", | |||
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this should refer to the generic powerpc risc cpu.
librz/arch/p/asm/asm_tricore_cs.c
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| @@ -103,6 +103,14 @@ static bool fini(void *u) { | |||
| return true; | |||
| } | |||
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| char **tricore_cpu_descriptions() { | |||
| static char *cpu_desc[] = { | |||
| "tricore", "TriCore: A 32-bit and 64-bit architecture developed by Infineon, designed for automotive, industrial, and embedded applications with a focus on real-time processing and high performance.", | |||
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shorten this, no need to mention 32/64 bits. just mention that is the generic tricore cpu developed by infineon.
librz/arch/p/asm/asm_xtensa_cs.c
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| "esp32", "32-bit microcontroller with Wi-Fi and Bluetooth capabilities, designed for high-performance applications.", | ||
| "esp32s2", "32-bit microcontroller with Wi-Fi and USB OTG support, optimized for low-power and IoT applications.", | ||
| "esp8266", "Low-cost 32-bit microcontroller with Wi-Fi support, commonly used in IoT projects and embedded systems.", |
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Instead of 32-bit microcontroller write Xtensa microcontroller ....
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Shorten most of them. the CPU description should mention only the difference between cpus, no need for such long explanation.
For example: High-performance ARM Cortex-A72 processor, optimized for mobile and embedded systems. should just be ARM Cortex-A72 processor
I would not agree with this. Because if the feature was specifically targeted at beginners. So a longer explanation gives more context to them. Maybe it doesn't need to be very long, but more then just the model name IMHO. Otherwise, the current short name is already enough. Wouldn't it? |
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The longer explanation has to be accurate though. |
Absolutely. I think Wikipedia accurate is enough. Not ChatGPT accurate though ;) |
This is what I meant. The explanation I saw there is often meaningless. I would expect the beginner to also search the cpu name/model. So if we say cortexm it's OK to refer to a cpu family in the description but not such useless info I see there. |
No is not. The cpu name is associated to a cpu family or instruction set extension, which may or not be understandable. See the Pic cpus. I didn't know what "baseline" was till I went and check the code. Same for arm "cpus". Those are arch extensions which only some families of arm cpus have. The description should indicate what that X for rizin means, because not all the cpus names are obvious. |
Good point. Then I agree with you. |
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Sorry, didnt check the descriptions. |
chore: formatting formatting formatting avr
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Looks good! Please just address the small comments.
Also check the commands for leaks.
You can either use valgrind (if you are on Linux):
valgrind --leak-check=full rizin -qc "aL ; aLc mips"
or ASAN. How to build with ASAN is described in BUILDING.md.
Then you need to add the env variable
LSAN_OPTIONS: "halt_on_error=1:abort_on_error=1:print_summary=1:print_stacktrace=1" rizin -qc "aL ; aLc mips"
Your checklist for this pull request
Detailed description
I have added a command aLc which expects a plugin name as argument and prints out the cpu and their respective descriptions for that plugin. I added descriptions to each plugin which contained cpu in them. I have changed the aL to be a command group with state output and aLc having aL as its parent.
Test plan
Use the command:
aLc mips
aLc xtensa
aLc arm
Closing issues
closes #4806