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- Review ucm configs v3
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sebanc committed Feb 4, 2024
1 parent e172dc1 commit a117abf
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136 changes: 136 additions & 0 deletions alsa-ucm-conf/ucm2/AMD/acp5x/HiFi.conf
Original file line number Diff line number Diff line change
@@ -0,0 +1,136 @@
Macro.apcmremap.CtlRemapMonoToStereoVolSw {
Type Volume
Stereo "Analog PCM"
MonoL "Left Analog PCM"
MonoR "Right Analog PCM"
}

Macro.dpcmremap.CtlRemapMonoToStereoVolSw {
Type Volume
Stereo "Digital PCM"
MonoL "Left Digital PCM"
MonoR "Right Digital PCM"
}

SectionVerb {
EnableSequence [
disdevall ""
cset "name='ADC Phase Switch' 1"
cset "name='BIQ Coefficients' 0x03,0x5a,0x00,0x06,0xfc,0xac,0x00,0x00,0xfe,0x58,0x00,0x00,0x03,0x50,0x00,0x06,0xfe,0x58,0x00,0x08"
cset "name='Left PCM Source' DSP"
cset "name='Right PCM Source' DSP"
]

Value {
TQ "HiFi"
}
}

SectionDevice."Headphones" {
Comment "Headphones"

ConflictingDevice [
"Speaker"
]

EnableSequence [
cset "name='Headphone Switch' on"
]

DisableSequence [
cset "name='Headphone Switch' off"
]

Value {
PlaybackPriority 200
PlaybackPCM "hw:${CardId},0"
JackControl "Headphone Jack"
PlaybackMixerElem "Headphone"
PlaybackMasterElem "Digital Playback"
}
}

SectionDevice."Speaker" {
Comment "Speaker"

ConflictingDevice [
"Headphones"
]

EnableSequence [
cset "name='Left DSP RX1 Source' ASPRX1"
cset "name='Right DSP RX1 Source' ASPRX2"
cset "name='Left DSP RX2 Source' ASPRX1"
cset "name='Right DSP RX2 Source' ASPRX2"
cset "name='Left DSP1 Preload Switch' 1"
cset "name='Right DSP1 Preload Switch' 1"
]

DisableSequence [
cset "name='Left DSP RX1 Source' Zero"
cset "name='Right DSP RX1 Source' Zero"
cset "name='Left DSP RX2 Source' Zero"
cset "name='Right DSP RX2 Source' Zero"
cset "name='Left DSP1 Preload Switch' 0"
cset "name='Right DSP1 Preload Switch' 0"
]

Value {
PlaybackPriority 100
PlaybackPCM "hw:${CardId},1"
PlaybackMixerElem "Digital PCM"
PlaybackMasterElem "Analog PCM"
PlaybackVolume "Digital PCM Volume"
}
}

SectionDevice."Mic" {
Comment "Internal Microphone"

ConflictingDevice [
"Headset"
]

EnableSequence [
cset "name='Int Mic Switch' on"
cset "name='DMIC Enable Switch' on"
]

DisableSequence [
cset "name='Int Mic Switch' off"
cset "name='DMIC Enable Switch' off"
]

Value {
CapturePriority 200
CapturePCM "hw:${CardId},0"
CaptureMixerElem "Int Mic"
CaptureVolume "Mic Volume"
CaptureSwitch "Int Mic Switch"
}
}

SectionDevice."Headset" {
Comment "Headset Microphone"

ConflictingDevice [
"Mic"
]

EnableSequence [
cset "name='Headset Mic Switch' on"
]

DisableSequence [
cset "name='Headset Mic Switch' off"
]

Value {
CapturePriority 300
CapturePCM "hw:${CardId},0"
CaptureMixerElem "Headset Mic"
CaptureVolume "Mic Volume"
CaptureSwitch "Headset Mic Switch"
JackControl "Headset Mic Jack"
}
}
53 changes: 53 additions & 0 deletions alsa-ucm-conf/ucm2/AMD/acp5x/acp5x.conf
Original file line number Diff line number Diff line change
@@ -0,0 +1,53 @@
Syntax 6

Comment "Vangogh internal card"

#
# Macro CtlRemapMonoToStereoVolSw - join two mono controls into one stereo
#
# Arguments:
# Type - Volume or Switch
# Stereo - Name of the stereo control to be created
# MonoL - Name of the mono control to be used as Left channel
# MonoR - Name of the mono control to be used as Right channel
#
DefineMacro.CtlRemapMonoToStereoVolSw {
LibraryConfig.remap.Config {
ctl.default.map."name='${var:__Stereo} ${var:__Type}'" {
"name='${var:__MonoL} ${var:__Type}'".vindex.0 0
"name='${var:__MonoR} ${var:__Type}'".vindex.1 0
}
}
}

#
# Currently restricted to Steam Deck hardware.
#
If.jupiter {
Condition {
Type String
String1 "Brunch"
String2 "${sys:devices/virtual/dmi/id/product_name}"
}
True {
SectionUseCase."HiFi" {
File "/AMD/acp5x/HiFi.conf"
Comment "Default"
}

BootSequence [
cset "name='Digital Playback Volume' 252"
cset "name='Left Analog PCM Volume' 17"
cset "name='Right Analog PCM Volume' 17"
cset "name='Left Digital PCM Volume' 870"
cset "name='Right Digital PCM Volume' 870"
cset "name='Headphone Volume' 2"
cset "name='Digital Playback Volume' 192"
cset "name='Mic Volume' 252"
cset "name='Frontend PGA Volume' 27"
]

Include.card-init.File "/lib/card-init.conf"
Include.ctl-remap.File "/lib/ctl-remap.conf"
}
}
1 change: 1 addition & 0 deletions alsa-ucm-conf/ucm2/conf.d/acp5x/Valve-Jupiter-1.conf
166 changes: 0 additions & 166 deletions kernel-patches/6.6/base/base.patch
Original file line number Diff line number Diff line change
Expand Up @@ -421,57 +421,6 @@ diff -ruN a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c
reboot_type = BOOT_KBD;
break;

diff -ruN a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
--- a/arch/x86/kernel/tsc.c 2023-11-08 11:56:25.000000000 +0100
+++ b/arch/x86/kernel/tsc.c 2024-01-24 07:43:04.000000000 +0100
@@ -680,10 +680,30 @@
* Denverton SoCs don't report crystal clock, and also don't support
* CPUID.0x16 for the calculation below, so hardcode the 25MHz crystal
* clock.
+ * Also estimation code is not reliable and gives 1.5% difference for
+ * tsc/clock ratio on Skylake mobile. Therefore below is a hardcoded
+ * crystal frequency for Skylake which was removed by upstream commit
+ * "x86/tsc: Use CPUID.0x16 to calculate missing crystal frequency"
+ * This is temporary workaround for bugs:
+ * b/148108096, b/154283905, b/146787525, b/153400677, b/148178929
+ * chromium/1031054
+ *
+ * Temporarily adding workaround for hatch devices - Kohaku, dratini
+ * and jinlon. (b/244456300)
*/
- if (crystal_khz == 0 &&
- boot_cpu_data.x86_model == INTEL_FAM6_ATOM_GOLDMONT_D)
- crystal_khz = 25000;
+ if (crystal_khz == 0) {
+ switch (boot_cpu_data.x86_model) {
+ case INTEL_FAM6_KABYLAKE_L:
+ crystal_khz = 24000; /* 24.0 MHz */
+ break;
+ case INTEL_FAM6_ATOM_GOLDMONT_D:
+ crystal_khz = 25000; /* 25.0 MHz */
+ break;
+ case INTEL_FAM6_SKYLAKE_L:
+ crystal_khz = 24000; /* 24.0 MHz */
+ break;
+ }
+ }

/*
* TSC frequency reported directly by CPUID is a "hardware reported"
@@ -1394,7 +1414,12 @@
*/
hpet = is_hpet_enabled();
tsc_start = tsc_read_refs(&ref_start, hpet);
- schedule_delayed_work(&tsc_irqwork, HZ);
+ /* temporary workaround for AMD Cezanne. BUG=b:191845735 */
+ if ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) && (boot_cpu_data.x86 == 25)
+ && (boot_cpu_data.x86_model == 80))
+ schedule_delayed_work(&tsc_irqwork, HZ/2);
+ else
+ schedule_delayed_work(&tsc_irqwork, HZ);
return;
}

diff -ruN a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
--- a/arch/x86/kvm/cpuid.c 2023-11-08 11:56:25.000000000 +0100
+++ b/arch/x86/kvm/cpuid.c 2024-01-24 07:43:04.000000000 +0100
Expand Down Expand Up @@ -26411,106 +26360,6 @@ diff -ruN a/drivers/staging/Makefile b/drivers/staging/Makefile
obj-$(CONFIG_STAGING_BOARD) += board/
obj-$(CONFIG_LTE_GDM724X) += gdm724x/
obj-$(CONFIG_FB_TFT) += fbtft/
diff -ruN a/drivers/tee/amdtee/shm_pool.c b/drivers/tee/amdtee/shm_pool.c
--- a/drivers/tee/amdtee/shm_pool.c 2023-11-08 11:56:25.000000000 +0100
+++ b/drivers/tee/amdtee/shm_pool.c 2024-01-24 07:43:45.000000000 +0100
@@ -4,33 +4,75 @@
*/

#include <linux/slab.h>
+#include <linux/mm.h>
+#include <linux/dma-map-ops.h>
#include <linux/tee_drv.h>
#include <linux/psp.h>
#include "amdtee_private.h"

+#if IS_BUILTIN(CONFIG_AMDTEE) && IS_ENABLED(CONFIG_DMA_CMA)
+static void *alloc_from_cma(size_t size)
+{
+
+ int nr_pages = size >> PAGE_SHIFT;
+ struct page *page;
+
+ page = dma_alloc_from_contiguous(NULL, nr_pages, 0, false);
+ if (page)
+ return page_to_virt(page);
+
+ return NULL;
+}
+
+static bool free_from_cma(struct tee_shm *shm)
+{
+
+ int nr_pages;
+ struct page *page;
+
+ if (!dev_get_cma_area(NULL))
+ return false;
+
+ nr_pages = shm->size >> PAGE_SHIFT;
+ page = virt_to_page(shm->kaddr);
+ return dma_release_from_contiguous(NULL, page, nr_pages);
+}
+#else
+static void *alloc_from_cma(size_t size)
+{
+ return NULL;
+}
+
+static bool free_from_cma(struct tee_shm *shm)
+{
+ return false;
+}
+#endif
+
static int pool_op_alloc(struct tee_shm_pool *pool, struct tee_shm *shm,
size_t size, size_t align)
{
- unsigned int order = get_order(size);
- unsigned long va;
+ void *va;
int rc;

- /*
- * Ignore alignment since this is already going to be page aligned
- * and there's no need for any larger alignment.
- */
- va = __get_free_pages(GFP_KERNEL | __GFP_ZERO, order);
+ size = PAGE_ALIGN(size);
+
+ va = alloc_from_cma(size);
+
+ if (!va)
+ va = alloc_pages_exact(size, GFP_KERNEL | __GFP_ZERO);
+
if (!va)
return -ENOMEM;

shm->kaddr = (void *)va;
shm->paddr = __psp_pa((void *)va);
- shm->size = PAGE_SIZE << order;
+ shm->size = size;

/* Map the allocated memory in to TEE */
rc = amdtee_map_shmem(shm);
if (rc) {
- free_pages(va, order);
+ free_pages_exact(va, size);
shm->kaddr = NULL;
return rc;
}
@@ -42,7 +84,10 @@
{
/* Unmap the shared memory from TEE */
amdtee_unmap_shmem(shm);
- free_pages((unsigned long)shm->kaddr, get_order(shm->size));
+
+ if (!free_from_cma(shm))
+ free_pages_exact(shm->kaddr, shm->size);
+
shm->kaddr = NULL;
}

diff -ruN a/drivers/thermal/thermal_core.c b/drivers/thermal/thermal_core.c
--- a/drivers/thermal/thermal_core.c 2023-11-08 11:56:25.000000000 +0100
+++ b/drivers/thermal/thermal_core.c 2024-01-24 07:43:45.000000000 +0100
Expand Down Expand Up @@ -30167,21 +30016,6 @@ diff -ruN a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h

/* xHCI roothub code */
void xhci_set_link_state(struct xhci_hcd *xhci, struct xhci_port *port,
diff -ruN a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
--- a/drivers/usb/host/xhci-pci.c 2023-11-08 11:56:25.000000000 +0100
+++ b/drivers/usb/host/xhci-pci.c 2024-01-24 07:43:46.000000000 +0100
@@ -364,10 +364,8 @@
(pdev->device == 0x15e0 || pdev->device == 0x15e1))
xhci->quirks |= XHCI_SNPS_BROKEN_SUSPEND;

- if (pdev->vendor == PCI_VENDOR_ID_AMD && pdev->device == 0x15e5) {
+ if (pdev->vendor == PCI_VENDOR_ID_AMD && pdev->device == 0x15e5)
xhci->quirks |= XHCI_DISABLE_SPARSE;
- xhci->quirks |= XHCI_RESET_ON_RESUME;
- }

if (pdev->vendor == PCI_VENDOR_ID_AMD)
xhci->quirks |= XHCI_TRUST_TX_LENGTH;
diff -ruN a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
--- a/drivers/usb/host/xhci-ring.c 2023-11-08 11:56:25.000000000 +0100
+++ b/drivers/usb/host/xhci-ring.c 2024-01-24 07:43:46.000000000 +0100
Expand Down

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