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1. add Rewarded Porting TinyMaix
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Zepan committed Sep 7, 2022
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3 changes: 2 additions & 1 deletion README.md
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[中文](README_ZH.md) | English

TinyMaix is a tiny inference Neural Network library specifically for microcontrollers (TinyML).
We design it follow the rule: Easy-to-Use > Portable > Speed > Space.
We design it follow the rule: **Easy-to-Use** > **Portable** > **Speed** > **Space**
Good News: [**Rewarded Porting TinyMaix**](reward.md)

**Highlights**
- Core Code less than **400 lines**(tm_layers.c+tm_model.c+arch_cpu.h), code .text section less than **3KB**
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3 changes: 2 additions & 1 deletion README_ZH.md
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中文 | [English](README.md)

TinyMaix是面向单片机的超轻量级的神经网络推理库,即TinyML推理库,可以让你在任意单片机上运行轻量级深度学习模型~
我们的设计原则:易用性>移植性>速度>空间
我们的设计原则:**易用性** > **移植性** > **速度** > **空间**
好消息: [**TinyMaix有奖移植**](reward.md)

**关键特性**
- 核心代码少于**400行**(tm_layers.c+tm_model.c+arch_cpu.h), 代码段(.text)少于**3KB**
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7 changes: 0 additions & 7 deletions benchmark.md
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|--- |--- |--- |--- |--- |--- |--- |--- |---|
|Atmega328 |AVR | 32KB| 2KB| 16M|50(*)|XXX |XXX ||
|STM32G030F6 |ARM CM0+| 32KB| 8KB| 64M|18 |XXX |XXX ||
|nRF52840 |ARM CM4 | 1MB| 256KB| 64M|--- |--- |--- ||
|STM32F103C8 |ARM CM3 | 64KB| 20KB| 72M|8 |XXX |XXX ||
|STM32F411CE |ARM CM4 |512KB| 128KB| 150M|3 |76 |420 ||
|RP2040 |ARM CM0+| 2MB| 264KB| 133M|--- |--- |--- ||
|BL702 |RV32 |512KB| 132KB| 144M|3 |--- |--- ||
|ESP32-C3 |Xtensa | 4MB| 400KB| 160M|--- |--- |--- ||
|ESP32-S2 |Xtensa | 4MB| 320KB| 240M|2 |--- |--- ||
|ESP32-S3 |Xtensa | 4MB| 512KB| 240M|--- |--- |--- ||
|BL618 |RV32P | 4MB|0.5+ 4MB| 320M|--- |--- |--- ||
|BL808's E907|RV32P | 16MB|0.8+64MB| 320M|<1 |35 |159 |mdl in psram|
|STM32H750 |ARM CM7 | 1MB| 1024KB| 480M|<1 |15 |66 ||
|BL808's C906|RV64V | 16MB|0.8+64MB| 480M|<1 |10 |60 ||
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42 changes: 42 additions & 0 deletions doc/porting/port_STM32F411.md
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# Port TinyMaix to STM32F411

## Chip
|Item |Parameter|
|-- |--|
|Chip |STM32F411|
|Arch |ARM Cortex M4|
|Freq |150M |
|Flash|512KB|
|RAM |128KB|
|Acceleration| ARM SIMD|

## Board
WeAct Studio STM32F411CEU6 V3.0
<a href="assets/STM32F411CEU6.png"><img width=300 src="assets/STM32F411CEU6.png"/></a>

## Development Environment
MDK 5.37

## Step/Project
Just simple edit tm_port.h...

Porting Project in:
https://github.com/Zepan/TinyMaix_STM32F411



## Result
|config |mnist|cifar|mbnet96|Note|
|--- |--- |--- |--- |--- |
|O0 CPU |2 |136 |549 ||
|O1 CPU |2 |120 |554 ||
|O0 SIMD |2 |107 |422 ||
|O1 SIMD |2 |75 |420 ||


## Note
STM32F411 Flash is too small to place 96x96 image, use random data instead.
O1 slow than O0 is beacuse Flash random read speed limit.
Use mbnet 128 input will much faster.


25 changes: 25 additions & 0 deletions reward.md
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# Rewarded Porting TinyMaix
In order to show the portability of TinyMaix, Sipeed launched the Rewarded Porting TinyMaix~

From now on until **December 31, 2022**, add support for any new chip that is not in the current tested list (see benchmark.md),
You can get Sipeed's latest AIoT board: 480M C906 + 320M E907 + WiFi/BT + 64M PSRAM + 2MP Camera + CTP LCD ~

Rules:
1. The same series of chips are considered as one chip. For example, stm32f411 has been transplanted, so stm32f401 is considered as the same chip; Stm32h7 and stm32f7 are considered as different series chips as "F7" and "H7" is different
2. Porting of non-MCU chip is allowed, but only record one chip for one core. For example, arm cortex A7 only takes the first one A7 chip commit.
3. The benchmark of the runnable model within the chip capability need to be tested, from low to high is:
1. mnist 2KB Flash, 2KB RAM //Handwritten digit recognition (28x28x1)
2. cifar 89KB Flash, 11KB RAM //10 classes classification(32x32x3)
3. mbnet 485KB Flash, 54KB RAM //1000 classes,mobilenet v1 0.25, 96x96x3 input
4. Write a porting log (refer to doc/porting/port_STM32F411.md), and submit PR to this repo.

# Advanced feature Awards
Those who provide TinyMaix with the following advanced function improvements can receive a Quad-Core C910 board in addition!
1. Add mobilenetv2 support for TinyMaix, that is, mainly add concat operator (involving model conversion script and tinymaix C code, requiring model structure compatibility)
2. Take mobilenet V1 0.25 96x96 as the test model and the corresponding architecture O1 as the benchmark to try to optimize the execution speed and increase the execution speed by at least 15%
3. Improve FP8 support for tinymaix, support FP8 mobilenetv1 model
4. Add a new architecture acceleration for tinymaix, such as xtensa's vector instruction set, and reduce infer time by at least 25% compared with the original CPU execution speed
5. Other advanced function updates approved by sipeed

# Recruit
For users in China we will provide priority interview opportunity if you submit result successfully. (send resume to [email protected])

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