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Add perfect forwarding and constexpr to reverse mode functions #3092

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Summary

This is a pretty decently sized PR that does a few things

  1. For functions where perfect forwarding would be nice, we change the signature to do that so temporaries can use the new move semantics from Allow arena_matrix to use move semantics #2928
  2. While I was cleaning doing that I found a lot of places in the reverse mode code that we could use if constexpr and remove uses of promote_scalar_t and forward_as. This gets rid of a lot of overhead metaprogramming we had to do with c++14. Using if constexpr also lead to a lot of other little nice cleanups with redundant code
  3. Return types for all these functions are now an arena type. This is fine for the stan language since we always cast them to an eigen matrix type which will force a copy

Tests

All current tests pass

Side Effects

Release notes

Add perfect forwarding to reverse mode autodiff functions

Checklist

  • Copyright holder: Steve Bronder

    The copyright holder is typically you or your assignee, such as a university or company. By submitting this pull request, the copyright holder is agreeing to the license the submitted work under the following licenses:
    - Code: BSD 3-clause (https://opensource.org/licenses/BSD-3-Clause)
    - Documentation: CC-BY 4.0 (https://creativecommons.org/licenses/by/4.0/)

  • the basic tests are passing

    • unit tests pass (to run, use: ./runTests.py test/unit)
    • header checks pass, (make test-headers)
    • dependencies checks pass, (make test-math-dependencies)
    • docs build, (make doxygen)
    • code passes the built in C++ standards checks (make cpplint)
  • the code is written in idiomatic C++ and changes are documented in the doxygen

  • the new changes are tested

@SteveBronder
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SteveBronder commented Jul 12, 2024

Oh clang-format made a wild choice for formatting of long if constexprs. I'll see what's going on here

@andrjohns
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I'm generally in favour of move-semantics, but are we ready to start enforcing a c++17 minimum with if constexpr? That implies a hard requirement for the next Stan version to support C++17, and that feels a little soon if we only started warning with the current release

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The message we have says

C++17 support is mandatory in the next release of Stan.

I think it’s fine? People can always use older versions, and basic C++17 support is very old by now

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Ah I didn't pay attention to the actual warning, well that makes sense to me then! I'll give this a proper review tomorrow

@SteveBronder
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@andrjohns I need to figure out the weird clang-format stuff before this is ready for review. It's breaking type traits over to newlines for some reason

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No wokkas, feel free to ping me when it's sorted

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@andrjohns Alrighty I think this is ready for review!

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Name Old Result New Result Ratio Performance change( 1 - new / old )
arma/arma.stan 0.36 0.33 1.08 7.47% faster
low_dim_corr_gauss/low_dim_corr_gauss.stan 0.01 0.01 0.93 -7.69% slower
gp_regr/gen_gp_data.stan 0.02 0.02 1.03 2.74% faster
gp_regr/gp_regr.stan 0.1 0.1 0.98 -1.67% slower
sir/sir.stan 70.95 70.36 1.01 0.83% faster
irt_2pl/irt_2pl.stan 4.29 4.22 1.02 1.65% faster
eight_schools/eight_schools.stan 0.06 0.06 1.07 6.83% faster
pkpd/sim_one_comp_mm_elim_abs.stan 0.25 0.25 1.0 0.38% faster
pkpd/one_comp_mm_elim_abs.stan 19.87 18.71 1.06 5.85% faster
garch/garch.stan 0.47 0.41 1.16 13.79% faster
low_dim_gauss_mix/low_dim_gauss_mix.stan 2.81 2.63 1.07 6.11% faster
arK/arK.stan 1.81 1.72 1.05 4.73% faster
gp_pois_regr/gp_pois_regr.stan 2.84 2.74 1.04 3.58% faster
low_dim_gauss_mix_collapse/low_dim_gauss_mix_collapse.stan 8.98 8.37 1.07 6.84% faster
performance.compilation 185.26 183.52 1.01 0.94% faster
Mean result: 1.038680038150237

Jenkins Console Log
Blue Ocean
Commit hash: 7c9d4581cb825c3e95cbeb0a41bad59cdf569579


Machine information No LSB modules are available. Distributor ID: Ubuntu Description: Ubuntu 20.04.3 LTS Release: 20.04 Codename: focal

CPU:
Architecture: x86_64
CPU op-mode(s): 32-bit, 64-bit
Byte Order: Little Endian
Address sizes: 46 bits physical, 48 bits virtual
CPU(s): 80
On-line CPU(s) list: 0-79
Thread(s) per core: 2
Core(s) per socket: 20
Socket(s): 2
NUMA node(s): 2
Vendor ID: GenuineIntel
CPU family: 6
Model: 85
Model name: Intel(R) Xeon(R) Gold 6148 CPU @ 2.40GHz
Stepping: 4
CPU MHz: 2400.000
CPU max MHz: 3700.0000
CPU min MHz: 1000.0000
BogoMIPS: 4800.00
Virtualization: VT-x
L1d cache: 1.3 MiB
L1i cache: 1.3 MiB
L2 cache: 40 MiB
L3 cache: 55 MiB
NUMA node0 CPU(s): 0,2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32,34,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,66,68,70,72,74,76,78
NUMA node1 CPU(s): 1,3,5,7,9,11,13,15,17,19,21,23,25,27,29,31,33,35,37,39,41,43,45,47,49,51,53,55,57,59,61,63,65,67,69,71,73,75,77,79
Vulnerability Gather data sampling: Mitigation; Microcode
Vulnerability Itlb multihit: KVM: Mitigation: VMX disabled
Vulnerability L1tf: Mitigation; PTE Inversion; VMX conditional cache flushes, SMT vulnerable
Vulnerability Mds: Mitigation; Clear CPU buffers; SMT vulnerable
Vulnerability Meltdown: Mitigation; PTI
Vulnerability Mmio stale data: Mitigation; Clear CPU buffers; SMT vulnerable
Vulnerability Retbleed: Mitigation; IBRS
Vulnerability Spec rstack overflow: Not affected
Vulnerability Spec store bypass: Mitigation; Speculative Store Bypass disabled via prctl
Vulnerability Spectre v1: Mitigation; usercopy/swapgs barriers and __user pointer sanitization
Vulnerability Spectre v2: Mitigation; IBRS, IBPB conditional, STIBP conditional, RSB filling, PBRSB-eIBRS Not affected
Vulnerability Srbds: Not affected
Vulnerability Tsx async abort: Mitigation; Clear CPU buffers; SMT vulnerable
Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3 invpcid_single pti intel_ppin ssbd mba ibrs ibpb stibp tpr_shadow vnmi flexpriority ept vpid ept_ad fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx rdt_a avx512f avx512dq rdseed adx smap clflushopt clwb intel_pt avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local dtherm ida arat pln pts hwp hwp_act_window hwp_epp hwp_pkg_req pku ospke md_clear flush_l1d arch_capabilities

G++:
g++ (Ubuntu 9.4.0-1ubuntu1~20.04) 9.4.0
Copyright (C) 2019 Free Software Foundation, Inc.
This is free software; see the source for copying conditions. There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

Clang:
clang version 10.0.0-4ubuntu1
Target: x86_64-pc-linux-gnu
Thread model: posix
InstalledDir: /usr/bin

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Just a few requests (some of which apply to a bunch of changes though!).

Quick clarification question, you've marked a bunch of functions as inline now - any particular motivation there?

Also, with several changes of return types to arena<T> (from just T), is to avoid a copy on return or something else?


template <typename... Types>
inline constexpr bool is_constant_v
= std::conjunction<is_constant<Types>...>::value;
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Suggested change
= std::conjunction<is_constant<Types>...>::value;
= math::conjunction<is_constant<Types>...>::value;

For consistency

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Also same comment about redundancy - is there a situation where is_constant_all_v would behave differently to is_constant_v here?

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Actually I think we should start using the std version! We just used the stan math version because we didn't have c++17 available previously

Also same comment about redundancy - is there a situation where is_constant_all_v would behave differently to is_constant_v here?

Since I made is_constant_all_v to accept multiple types there should be no difference. I'm going to put up another PR where throughout the math library I change is_constant_all with is_constant_v. Which should clean up a lot.

@@ -28,6 +28,10 @@ struct is_stan_scalar
is_fvar<std::decay_t<T>>, std::is_arithmetic<std::decay_t<T>>,
is_complex<std::decay_t<T>>>::value> {};

template <typename... Types>
inline constexpr bool is_stan_scalar_v
= std::conjunction<is_stan_scalar<Types>...>::value;
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Suggested change
= std::conjunction<is_stan_scalar<Types>...>::value;
= math::conjunction<is_stan_scalar<Types>...>::value;

Comment on lines +22 to +29
template <typename... Types>
inline constexpr bool is_autodiff_v
= math::conjunction<is_autodiff<Types>...>::value;

template <typename... Types>
inline constexpr bool is_autodiffable_v
= math::conjunction<is_autodiff<scalar_type_t<Types>>...>::value;

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These two typedefs seem to test the same thing. Also, shouldn't this be is_autodiff_all_v?

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These need better names. is_autodiff_v<> looks to see is the type is a fvar or var and fails otherwise. is_autodiffable_v looks into the scalar type of the type to see if it is autodiffable, so things like eigen matrices and vectors of var or fvar types would be true for is_autodiffable_v.

I left is_autodiff alone to not mess with the other functions that use it (mostly functions that use it in a requires). Maybe the current is_autodiff should be named is_autodiff_scalar?

if (!is_constant<T1>::value && !is_constant<T2>::value) {
arena_t<promote_scalar_t<var, T1>> arena_A = A;
arena_t<promote_scalar_t<var, T2>> arena_B = B;
if constexpr (is_autodiffable_v<T1, T2>) {
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Should this be !is_constant_all_v<T1, T2> for consistency with the original definition?

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(Applies to the other changes as well)

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Maybe I'm confused on definitions. If something is not constant then shouldn't it be autodiffable (i.e. var and fvar?)

arena_t<VarMat> arena_b = b;
if constexpr (is_autodiffable_v<Scalar,
VarMat> && is_autodiffable_v<VarMat>) {
auto atan2_val = atan2(a.val(), arena_b.val());
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Is this one of those situations where using auto with arena_matrix could be problematic?

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@SteveBronder SteveBronder Jul 17, 2024

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How so? Also I looked through these functions and massively simplified them in the latest commit

@@ -31,8 +31,7 @@ namespace math {
template <typename Mat1, typename Mat2,
require_all_eigen_t<Mat1, Mat2>* = nullptr,
require_any_eigen_vt<is_var, Mat1, Mat2>* = nullptr>
inline Eigen::Matrix<return_type_t<Mat1, Mat2>, 1, Mat1::ColsAtCompileTime>
columns_dot_product(const Mat1& v1, const Mat2& v2) {
inline auto columns_dot_product(const Mat1& v1, const Mat2& v2) {
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Suggested change
inline auto columns_dot_product(const Mat1& v1, const Mat2& v2) {
inline auto columns_dot_product(Mat1&& v1, Mat2&& v2) {

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We don't use perfect forwarding in this function so idt it is necessary

@@ -32,7 +32,7 @@ inline auto cumulative_sum(const EigVec& x) {
using return_t = return_var_matrix_t<EigVec>;
arena_t<return_t> res = cumulative_sum(x_arena.val()).eval();
if (unlikely(x.size() == 0)) {
return return_t(res);
return arena_t<return_t>(res);
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Suggested change
return arena_t<return_t>(res);
return res;

}
if (!is_constant<T3>::value) {
forward_as<T3_var>(arena_z).adj() += ret.adj().sum();
if constexpr (is_matrix_v<T1, T2, T3>) {
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This many if/else if statements (nested as well), feels a bit yucky. Not for this PR, but would be good to simplify in the future using as_array_or_scalar

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Yeah this was gross. I worked on this a bit and simplified it quite a lot!

arena_t<T1> arena_x = std::forward<T1>(x);
arena_t<T2> arena_y = std::forward<T2>(y);
arena_t<T3> arena_z = std::forward<T3>(z);
if constexpr (is_matrix_v<T1> && is_matrix_v<T2>) {
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Do we have an is_all_matrix_v for this?

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is_matrix_v is overloaded for multiple types so fixed this.

Comment on lines 286 to 288
using T2_t = std::decay_t<T2>;
arena_t<Eigen::Matrix<double, T2_t::RowsAtCompileTime,
T2_t::ColsAtCompileTime>>
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Suggested change
using T2_t = std::decay_t<T2>;
arena_t<Eigen::Matrix<double, T2_t::RowsAtCompileTime,
T2_t::ColsAtCompileTime>>
arena_t<promote_scalar_t<double, T2>>

or

Suggested change
using T2_t = std::decay_t<T2>;
arena_t<Eigen::Matrix<double, T2_t::RowsAtCompileTime,
T2_t::ColsAtCompileTime>>
arena_t<decltype(res.adj())>

Since arena_t<> uses plain_type_t internally (if I'm understanding that right)

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Quick clarification question, you've marked a bunch of functions as inline now - any particular motivation there?

All functions in stan math should be inline so that we are allowed to have multiple definitions across translation units.

Also, with several changes of return types to arena (from just T), is to avoid a copy on return or something else?

This is so we avoid a copy on the return. It's one of the bigger changes we agreed to with the bump to 5.0

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Name Old Result New Result Ratio Performance change( 1 - new / old )
arma/arma.stan 0.35 0.33 1.08 7.53% faster
low_dim_corr_gauss/low_dim_corr_gauss.stan 0.01 0.01 0.94 -6.4% slower
gp_regr/gen_gp_data.stan 0.03 0.02 1.19 16.02% faster
gp_regr/gp_regr.stan 0.1 0.1 1.04 3.99% faster
sir/sir.stan 69.34 70.09 0.99 -1.08% slower
irt_2pl/irt_2pl.stan 4.17 4.19 1.0 -0.41% slower
eight_schools/eight_schools.stan 0.06 0.06 1.03 3.29% faster
pkpd/sim_one_comp_mm_elim_abs.stan 0.25 0.25 1.0 0.15% faster
pkpd/one_comp_mm_elim_abs.stan 19.79 18.61 1.06 5.96% faster
garch/garch.stan 0.43 0.41 1.07 6.64% faster
low_dim_gauss_mix/low_dim_gauss_mix.stan 2.75 2.6 1.06 5.49% faster
arK/arK.stan 1.79 1.71 1.04 4.08% faster
gp_pois_regr/gp_pois_regr.stan 2.85 2.68 1.06 5.67% faster
low_dim_gauss_mix_collapse/low_dim_gauss_mix_collapse.stan 8.69 8.34 1.04 4.08% faster
performance.compilation 181.73 183.65 0.99 -1.06% slower
Mean result: 1.040106662702048

Jenkins Console Log
Blue Ocean
Commit hash: c83a397be67c59ba135871db25c53717e78d796e


Machine information No LSB modules are available. Distributor ID: Ubuntu Description: Ubuntu 20.04.3 LTS Release: 20.04 Codename: focal

CPU:
Architecture: x86_64
CPU op-mode(s): 32-bit, 64-bit
Byte Order: Little Endian
Address sizes: 46 bits physical, 48 bits virtual
CPU(s): 80
On-line CPU(s) list: 0-79
Thread(s) per core: 2
Core(s) per socket: 20
Socket(s): 2
NUMA node(s): 2
Vendor ID: GenuineIntel
CPU family: 6
Model: 85
Model name: Intel(R) Xeon(R) Gold 6148 CPU @ 2.40GHz
Stepping: 4
CPU MHz: 1138.945
CPU max MHz: 3700.0000
CPU min MHz: 1000.0000
BogoMIPS: 4800.00
Virtualization: VT-x
L1d cache: 1.3 MiB
L1i cache: 1.3 MiB
L2 cache: 40 MiB
L3 cache: 55 MiB
NUMA node0 CPU(s): 0,2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32,34,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,66,68,70,72,74,76,78
NUMA node1 CPU(s): 1,3,5,7,9,11,13,15,17,19,21,23,25,27,29,31,33,35,37,39,41,43,45,47,49,51,53,55,57,59,61,63,65,67,69,71,73,75,77,79
Vulnerability Gather data sampling: Mitigation; Microcode
Vulnerability Itlb multihit: KVM: Mitigation: VMX disabled
Vulnerability L1tf: Mitigation; PTE Inversion; VMX conditional cache flushes, SMT vulnerable
Vulnerability Mds: Mitigation; Clear CPU buffers; SMT vulnerable
Vulnerability Meltdown: Mitigation; PTI
Vulnerability Mmio stale data: Mitigation; Clear CPU buffers; SMT vulnerable
Vulnerability Retbleed: Mitigation; IBRS
Vulnerability Spec rstack overflow: Not affected
Vulnerability Spec store bypass: Mitigation; Speculative Store Bypass disabled via prctl
Vulnerability Spectre v1: Mitigation; usercopy/swapgs barriers and __user pointer sanitization
Vulnerability Spectre v2: Mitigation; IBRS, IBPB conditional, STIBP conditional, RSB filling, PBRSB-eIBRS Not affected
Vulnerability Srbds: Not affected
Vulnerability Tsx async abort: Mitigation; Clear CPU buffers; SMT vulnerable
Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3 invpcid_single pti intel_ppin ssbd mba ibrs ibpb stibp tpr_shadow vnmi flexpriority ept vpid ept_ad fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx rdt_a avx512f avx512dq rdseed adx smap clflushopt clwb intel_pt avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local dtherm ida arat pln pts hwp hwp_act_window hwp_epp hwp_pkg_req pku ospke md_clear flush_l1d arch_capabilities

G++:
g++ (Ubuntu 9.4.0-1ubuntu1~20.04) 9.4.0
Copyright (C) 2019 Free Software Foundation, Inc.
This is free software; see the source for copying conditions. There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

Clang:
clang version 10.0.0-4ubuntu1
Target: x86_64-pc-linux-gnu
Thread model: posix
InstalledDir: /usr/bin

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fyi I'm going to do just the constraints I've done so far. It's a lot of code so I'm going to hold off and fix those in another PR

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Name Old Result New Result Ratio Performance change( 1 - new / old )
arma/arma.stan 0.35 0.35 1.01 0.95% faster
low_dim_corr_gauss/low_dim_corr_gauss.stan 0.01 0.01 0.98 -1.78% slower
gp_regr/gen_gp_data.stan 0.02 0.02 1.01 1.38% faster
gp_regr/gp_regr.stan 0.11 0.1 1.13 11.45% faster
sir/sir.stan 74.72 70.55 1.06 5.58% faster
irt_2pl/irt_2pl.stan 4.86 3.88 1.25 20.26% faster
eight_schools/eight_schools.stan 0.07 0.05 1.22 17.74% faster
pkpd/sim_one_comp_mm_elim_abs.stan 0.27 0.24 1.12 10.77% faster
pkpd/one_comp_mm_elim_abs.stan 21.33 18.82 1.13 11.75% faster
garch/garch.stan 0.48 0.41 1.17 14.61% faster
low_dim_gauss_mix/low_dim_gauss_mix.stan 3.0 2.61 1.15 12.81% faster
arK/arK.stan 1.95 1.72 1.13 11.66% faster
gp_pois_regr/gp_pois_regr.stan 3.14 2.76 1.14 12.04% faster
low_dim_gauss_mix_collapse/low_dim_gauss_mix_collapse.stan 9.54 8.42 1.13 11.75% faster
performance.compilation 211.48 211.37 1.0 0.05% faster
Mean result: 1.1092383445345873

Jenkins Console Log
Blue Ocean
Commit hash: 2cd95be39b0482d0fedb7fe9a1e8c77b7084592a


Machine information No LSB modules are available. Distributor ID: Ubuntu Description: Ubuntu 20.04.3 LTS Release: 20.04 Codename: focal

CPU:
Architecture: x86_64
CPU op-mode(s): 32-bit, 64-bit
Byte Order: Little Endian
Address sizes: 46 bits physical, 48 bits virtual
CPU(s): 80
On-line CPU(s) list: 0-79
Thread(s) per core: 2
Core(s) per socket: 20
Socket(s): 2
NUMA node(s): 2
Vendor ID: GenuineIntel
CPU family: 6
Model: 85
Model name: Intel(R) Xeon(R) Gold 6148 CPU @ 2.40GHz
Stepping: 4
CPU MHz: 2400.000
CPU max MHz: 3700.0000
CPU min MHz: 1000.0000
BogoMIPS: 4800.00
Virtualization: VT-x
L1d cache: 1.3 MiB
L1i cache: 1.3 MiB
L2 cache: 40 MiB
L3 cache: 55 MiB
NUMA node0 CPU(s): 0,2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32,34,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,66,68,70,72,74,76,78
NUMA node1 CPU(s): 1,3,5,7,9,11,13,15,17,19,21,23,25,27,29,31,33,35,37,39,41,43,45,47,49,51,53,55,57,59,61,63,65,67,69,71,73,75,77,79
Vulnerability Gather data sampling: Mitigation; Microcode
Vulnerability Itlb multihit: KVM: Mitigation: VMX disabled
Vulnerability L1tf: Mitigation; PTE Inversion; VMX conditional cache flushes, SMT vulnerable
Vulnerability Mds: Mitigation; Clear CPU buffers; SMT vulnerable
Vulnerability Meltdown: Mitigation; PTI
Vulnerability Mmio stale data: Mitigation; Clear CPU buffers; SMT vulnerable
Vulnerability Retbleed: Mitigation; IBRS
Vulnerability Spec rstack overflow: Not affected
Vulnerability Spec store bypass: Mitigation; Speculative Store Bypass disabled via prctl
Vulnerability Spectre v1: Mitigation; usercopy/swapgs barriers and __user pointer sanitization
Vulnerability Spectre v2: Mitigation; IBRS, IBPB conditional, STIBP conditional, RSB filling, PBRSB-eIBRS Not affected
Vulnerability Srbds: Not affected
Vulnerability Tsx async abort: Mitigation; Clear CPU buffers; SMT vulnerable
Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3 invpcid_single pti intel_ppin ssbd mba ibrs ibpb stibp tpr_shadow vnmi flexpriority ept vpid ept_ad fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx rdt_a avx512f avx512dq rdseed adx smap clflushopt clwb intel_pt avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local dtherm ida arat pln pts hwp hwp_act_window hwp_epp hwp_pkg_req pku ospke md_clear flush_l1d arch_capabilities

G++:
g++ (Ubuntu 9.4.0-1ubuntu1~20.04) 9.4.0
Copyright (C) 2019 Free Software Foundation, Inc.
This is free software; see the source for copying conditions. There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

Clang:
clang version 10.0.0-4ubuntu1
Target: x86_64-pc-linux-gnu
Thread model: posix
InstalledDir: /usr/bin

@SteveBronder
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@andrjohns this is ready for review!

@WardBrian
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@SteveBronder are you hoping to get this in before the release? I noticed the makefile changes would also be useful for #3110

@SteveBronder
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Let me give this one hard look over and then I think it's ready to merge

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5 participants