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Unify naming scheme
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jserv committed Jan 18, 2024
1 parent c27d0de commit 71c3746
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Showing 7 changed files with 25 additions and 25 deletions.
4 changes: 2 additions & 2 deletions plic.c
Original file line number Diff line number Diff line change
Expand Up @@ -89,7 +89,7 @@ void plic_read(vm_t *vm,
vm_set_exception(vm, RV_EXC_LOAD_MISALIGN, vm->exc_val);
return;
default:
vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
return;
}
}
Expand All @@ -110,7 +110,7 @@ void plic_write(vm_t *vm,
vm_set_exception(vm, RV_EXC_STORE_MISALIGN, vm->exc_val);
return;
default:
vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
return;
}
}
4 changes: 2 additions & 2 deletions ram.c
Original file line number Diff line number Diff line change
Expand Up @@ -38,7 +38,7 @@ void ram_read(vm_t *vm,
RAM_FUNC(1, *value = (uint32_t) (int32_t) (int8_t) ((*cell) >> offset));
break;
default:
vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
return;
}
}
Expand All @@ -63,7 +63,7 @@ void ram_write(vm_t *vm,
<< offset);
break;
default:
vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
return;
}
}
28 changes: 14 additions & 14 deletions riscv.c
Original file line number Diff line number Diff line change
Expand Up @@ -391,7 +391,7 @@ static void op_privileged(vm_t *vm, uint32_t insn)
return;
}
if (insn & ((MASK(5) << 7) | (MASK(5) << 15))) {
vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
return;
}
switch (decode_i_unsigned(insn)) {
Expand All @@ -408,7 +408,7 @@ static void op_privileged(vm_t *vm, uint32_t insn)
/* TODO: Implement this */
break;
default:
vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
break;
}
}
Expand All @@ -432,7 +432,7 @@ static void csr_read(vm_t *vm, uint16_t addr, uint32_t *value)
if ((addr >> 8) == 0xC) {
uint16_t idx = addr & MASK(7);
if (idx >= 0x20 || !(vm->s_mode || ((vm->scounteren >> idx) & 1)))
vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
else {
/* Use the instruction counter for all of the counters.
* Ideally, reads should return the value before the increment,
Expand All @@ -445,7 +445,7 @@ static void csr_read(vm_t *vm, uint16_t addr, uint32_t *value)
}

if (!vm->s_mode) {
vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
return;
}

Expand Down Expand Up @@ -488,14 +488,14 @@ static void csr_read(vm_t *vm, uint16_t addr, uint32_t *value)
*value = vm->stval;
break;
default:
vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
}
}

static void csr_write(vm_t *vm, uint16_t addr, uint32_t value)
{
if (!vm->s_mode) {
vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
return;
}

Expand Down Expand Up @@ -540,7 +540,7 @@ static void csr_write(vm_t *vm, uint16_t addr, uint32_t value)
vm->stval = value;
break;
default:
vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
}
}

Expand Down Expand Up @@ -600,7 +600,7 @@ static void op_system(vm_t *vm, uint32_t insn)
break;

default:
vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
return;
}
}
Expand Down Expand Up @@ -689,7 +689,7 @@ static bool op_jmp(vm_t *vm, uint32_t insn, uint32_t a, uint32_t b)
case 0b101: /* BFUNC_BGE */
return ((int32_t) a) >= ((int32_t) b);
}
vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
return false;
}

Expand Down Expand Up @@ -724,15 +724,15 @@ static void op_jump_link(vm_t *vm, uint32_t insn, uint32_t addr)
static void op_amo(vm_t *vm, uint32_t insn)
{
if (unlikely(decode_func3(insn) != 0b010 /* amo.w */))
return vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
return vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
uint32_t addr = read_rs1(vm, insn);
uint32_t value, value2;
switch (decode_func5(insn)) {
case 0b00010: /* AMO_LR */
if (addr & 0b11)
return vm_set_exception(vm, RV_EXC_LOAD_MISALIGN, addr);
if (decode_rs2(insn))
return vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
return vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
mmu_load(vm, addr, RV_MEM_LW, &value, true);
if (vm->error)
return;
Expand Down Expand Up @@ -775,7 +775,7 @@ static void op_amo(vm_t *vm, uint32_t insn)
AMO_OP(value > value2 ? value : value2);
break;
default:
vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
return;
}
}
Expand Down Expand Up @@ -860,7 +860,7 @@ void vm_step(vm_t *vm)
/* TODO: implement for multi-threading */
break;
default:
vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
break;
}
break;
Expand All @@ -871,7 +871,7 @@ void vm_step(vm_t *vm)
op_system(vm, insn);
break;
default:
vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
break;
}
}
2 changes: 1 addition & 1 deletion riscv_private.h
Original file line number Diff line number Diff line change
Expand Up @@ -62,7 +62,7 @@ enum {
enum {
RV_EXC_PC_MISALIGN = 0, /**< Instruction address misaligned */
RV_EXC_FETCH_FAULT = 1, /**< Instruction access fault */
RV_EXC_ILLEGAL_INSTR = 2, /**< Illegal instruction */
RV_EXC_ILLEGAL_INSN = 2, /**< Illegal instruction */
RV_EXC_BREAKPOINT = 3, /**< Breakpoint */
RV_EXC_LOAD_MISALIGN = 4, /**< Load address misaligned */
RV_EXC_LOAD_FAULT = 5, /**< Load access fault */
Expand Down
4 changes: 2 additions & 2 deletions uart.c
Original file line number Diff line number Diff line change
Expand Up @@ -182,7 +182,7 @@ void u8250_read(vm_t *vm,
vm_set_exception(vm, RV_EXC_LOAD_MISALIGN, vm->exc_val);
return;
default:
vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
return;
}
}
Expand All @@ -202,7 +202,7 @@ void u8250_write(vm_t *vm,
vm_set_exception(vm, RV_EXC_STORE_MISALIGN, vm->exc_val);
return;
default:
vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
return;
}
}
4 changes: 2 additions & 2 deletions virtio-blk.c
Original file line number Diff line number Diff line change
Expand Up @@ -403,7 +403,7 @@ void virtio_blk_read(vm_t *vm,
vm_set_exception(vm, RV_EXC_LOAD_MISALIGN, vm->exc_val);
return;
default:
vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
return;
}
}
Expand All @@ -424,7 +424,7 @@ void virtio_blk_write(vm_t *vm,
vm_set_exception(vm, RV_EXC_STORE_MISALIGN, vm->exc_val);
return;
default:
vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
return;
}
}
Expand Down
4 changes: 2 additions & 2 deletions virtio-net.c
Original file line number Diff line number Diff line change
Expand Up @@ -407,7 +407,7 @@ void virtio_net_read(vm_t *vm,
vm_set_exception(vm, RV_EXC_LOAD_MISALIGN, vm->exc_val);
return;
default:
vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
return;
}
}
Expand All @@ -428,7 +428,7 @@ void virtio_net_write(vm_t *vm,
vm_set_exception(vm, RV_EXC_STORE_MISALIGN, vm->exc_val);
return;
default:
vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
return;
}
}
Expand Down

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