Implement CSE and peephole optimization

[vacantron]

Peephole optimization

The MOV after arithmetical or LOAD instruction is redundant. Simply assign the result to the destination register of the MOV instruction.

For example, the generated ARMv7 instructions of the statement t = 1 + 2 + 4 + 8 after optimizing are:

  mov	r0, 1
  mov	r1, 2
  add	r2, r0, r1
  mov	r0, 4
  add	r1, r2, r0
  mov	r0, 8
- add	r2, r1, r0
- mov	r0, r2
+ add	r0, r1, r0

The r0 register in last two instructions is reused and eliminates the redundant MOV instruction.

CSE (common subexpression elimination)

Reuse the read data if it came from the same location of memory. For example, the following code references the same element of array:

int main()
{
    char arr[1];
    int i, t, pos = 0;
    for (i = 0; i < 10000000; i++)
        t = arr[pos] + arr[pos];
    return 0;
}

After the optimization, the common statement arr[pos] was substituted by coping the read result.

  ldr	r0, [sp, 4]
  ldr	r1, [sp, 9]
  add	r2, r0, r1
  ldrb	r3, [r2]
  add	r2, r0, r1
- ldrb	r4, [r2]
- add	r3, r3, r4
+ mov	r2, r3
+ add	r2, r3, r2

It approximately reduces 5% run time on Raspberry Pi 3B.

The CSE is done before the liveness analysis. But the DCE (dead code elimination) is related to the traversal of liveness analysis, the implementation needs more improvement and is postponed.

Related issues:

• Implement basic optimizations #88

[jserv]

You should denote the benefit and measurements.