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Implement multiplication for RV32I #133

Merged
merged 1 commit into from
Jun 20, 2024
Merged

Implement multiplication for RV32I #133

merged 1 commit into from
Jun 20, 2024

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DrXiao
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@DrXiao DrXiao commented Jun 18, 2024

Previously, shecc would just generate hardware multiplication instructions for multiplication operations.

This commit adjusts riscv-codegen.c so that shecc can generate a sequence of instructions to achieve multiplication without any RV32M instruction if the '+m' option is disable.

Related: #46

@jserv jserv changed the title Support software emulation for multiplication on RISC-V targets Implement multiplication for RV32I Jun 18, 2024
@jserv jserv requested a review from vacantron June 18, 2024 15:34
tests/driver.sh Outdated Show resolved Hide resolved
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DrXiao commented Jun 19, 2024

This pull request just resolves implementing multiplication for RV32I, but division is still dependent on RV32M.
I think this issue should be closed by the next pull request implementing division for RV32I, but not closed by this pull request.

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Improve the git commit messages by fixing grammar mistakes.

This commit allows shecc to generate a sequence of
instructions to perform multiplication for RISC-V targets
with RV32I only.
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DrXiao commented Jun 19, 2024

I apologize for using improper git commit messages. I will refine my messages and update it.

@DrXiao DrXiao requested a review from jserv June 20, 2024 09:33
@jserv jserv merged commit 1faf508 into sysprog21:master Jun 20, 2024
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jserv commented Jun 20, 2024

Thank @DrXiao for contributing!

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2 participants