Skip to content

Commit

Permalink
Merge branch 'feature/aligned_data_access' into 'main'
Browse files Browse the repository at this point in the history
Disabling misaligned data access in code enabled_misaligned_data

See merge request riscv/dv/tt_riscv_arch_tests!25
  • Loading branch information
nmatusTT committed Jan 23, 2025
2 parents e08351a + d566cc2 commit d8fa08f
Show file tree
Hide file tree
Showing 2,401 changed files with 2,952,902 additions and 2,402,842 deletions.
16 changes: 13 additions & 3 deletions infra/quals.py
Original file line number Diff line number Diff line change
Expand Up @@ -158,7 +158,7 @@ def run(self) -> bool:
test.run()
if self.track_test_num:
print("\33[2K\r", flush=True, end="")
test_log = test.log.relative_to(self.repo_path) if test.result == PassFailEnum.FAILED else "N/A"
test_log = test.log.resolve() if test.result == PassFailEnum.FAILED else "N/A"
pass_fails.append(tuple([test.name, test.result.name, test_log]))

if all([t[1]=="PASS" for t in pass_fails]):
Expand Down Expand Up @@ -249,20 +249,30 @@ def __init__(self, testfile, opts, spike_path=None, log_directory=None, repo_pa
else:
vlen = None

misaligned_ok = True
if "bare_metal" in filepath.parts and "paging_bare" in filepath.parts:
aligned_extensions = ["rv_i", "rv_a", "rv_m", "rv_f"] # Extensions that need to be aligned
if any([ext in filepath.parts for ext in aligned_extensions]):
misaligned_ok = False


spike_priv = self.spike_priv_arg(str(filepath))
spike_isa = self.spike_isa_arg(str(filepath))

self._default_opts = [
f"--isa={spike_isa}",
f"--priv={spike_priv}",
"--misaligned",
"--max-instrs=500000",
"--log-commits",
"-l", f"{testfile}"
"-l",
]
if vlen:
self._default_opts.appned("--varch=vlen:{vlen},elen:64")
if misaligned_ok:
self._default_opts.append("--misaligned")


self._default_opts.append(f"{testfile}")
self._tool = spike_path or self.repo_path / "spike/spike"

if opts == "default":
Expand Down
4 changes: 3 additions & 1 deletion infra/whisper_config.json
Original file line number Diff line number Diff line change
Expand Up @@ -200,5 +200,7 @@
"min_bytes_per_elem" : 1,
"Comment" : "Hardware supports 32-bit ELEN plus some widening operations from 32 to 64-bit",
"max_bytes_per_elem" : 8
}
},

"enabled_misaligned_data" : false
}
4 changes: 3 additions & 1 deletion infra/whisper_config_vlen_128.json
Original file line number Diff line number Diff line change
Expand Up @@ -197,5 +197,7 @@
"min_bytes_per_elem" : 1,
"Comment" : "Hardware supports 32-bit ELEN plus some widening operations from 32 to 64-bit",
"max_bytes_per_elem" : 8
}
},

"enabled_misaligned_data" : false
}
Loading

0 comments on commit d8fa08f

Please sign in to comment.