A4091 improvements #227
A4091 improvements #227
Conversation
reinauer
commented
Aug 19, 2022
reinauer
commented
- lsi53c710: fix register access mapping
- A4091: Allow 32 and 64KB ROMs
Drivers that work around the Zorro III 68030 cache write-allocation mode bug might do read access and write access with an offset of 0x40. Allow these drivers to work like they would on real hardware.
The original hardware allows larger ROMs via a jumper. Emulate this behavior in WinUAE.
|
Is this different hardware than 32k ROM or does all A4091 variants support 64k ROM and if 32k ROM is installed, it appears twice in address space? (I have A4091 but it does not work..) Is this ROM Commodore official one or some 3rd party modification? Also generic 53c710 code shouldn't be modified but A4091 specific part because other boards also use it and might (accidentally) hit out of range addresses that shouldn't hit SCSI chip IO. You never know :) |
|
64K ROMs are supported by all DKB (Rev B) versions of the A4091. I think your assumption about 32K ROMs being mapped twice is correct on those boards, but I did not verify. The ROM I've been using is a (soon-to-be open-sourced) rewrite based on the NetBSD driver that supports NSD and TD64 as well as other improvements. This is work that was done for the ReAmiga 4091 project. Yes, I know it is not an "official" driver, but with the above changes WinUAE was particularly useful during development of the driver. If you're generally interested in merging, I can move the register wrapping out of the 710 specific code. |
|
A4091 64k ROM support should now be transparent (32k gets duplicated). Address masking is also now device specific. |
