- Visiting Lecturer (Engineering / IT) - SLTMobitel Nebula Institute of Technology
- Postgraduate Research Student - FPGR, SLTC Research University
- Research Intern (Temporary) - VLSI System Design, India
- Intern (Engineering) - Sri Lanka Telecom PLC
- Engineering Trainee - Sierra Construction LTD
| Digital Design: | RTL Logic Design, IP Design & Integration, HLS, FPGA / SoC, AMD-Xilinx Vivado® |
| Verification: | SystemVerilog UVM, Python, TLM, Verdi®, VCS® |
| Physical Design: | RTL-to-GDSII, DRC, LVS, Fusion Compiler® [DC / ICC2]), Openlane, Skywater SKY130 130-nm PDK |
| Tech Stack: | SystemVerilog, Verilog, VHDL, Embedded C, Tcl / TK, Xilinx Zynq®, Enterprise Linux (Rocky 8.10) |
University of Hertfordshire (2020-2022)
Bachelor of Engineering (Honours) Electrical and Electronic Engineering
First-class Honours — December 2022
Accredited by The Engineering Council UK, through The Institution of Engineering and Technology - UK
(Accredited First-degree for CEng)
Liverpool John Moores University (2023-2024)
Master of Science - Embedded Systems and IC Design
Distinction — December 2024
Accredited by The Engineering Council UK, through The Institution of Engineering and Technology - UK
(Accredited Further Learning for CEng)
- Low-Powered VLSI Implementation for Machine Learning
- Reconfigurable Hardware Accelerator Systems
- Optimization of Machine Vision Algorithms