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[a64] Implement an ARM64 backend#2259

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Commits on Apr 27, 2024

• [Build] Add Windows ARM64 support

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Commits on Apr 28, 2024

• [Base] Add Windows-ARM64 exception handling

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• [CPU] Add Windows ARM64 stack-walker

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• [ImGui] Stub ARM64 host debug text

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• [Base] Disable AVX check on ARM64

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• [CPU] Disable x64 backend on ARM64

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• [Base] Add Windows-ARM64 bit_count implementation

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• [CPU] Stub ARM64 to Null CPU backend

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• [UI] Fix divide-by-zero hazard

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Commits on Jun 23, 2024

• [Build] Link SDL2 to xenia-app

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• [CPU] Add ARM64 backend build target

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• [a64] Integrate oaknut submodule

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• [Base] Add ARM64 utility functions

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• [CPU] Implement ARM64 CPU backend

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• [a64] Fix BYTE_SWAP_V128

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• [a64] Implement OPCODE_EXTRACT

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• [a64] Implement OPCODE_SPLAT

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• [a64] Implement OPCODE_INSERT

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• [a64] Implement OPCODE_LOAD_VECTOR_SHL

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• [a64] Implement OPCODE_LOAD_VECTOR_SHR

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• [a64] Implement OPCODE_PACK(D3DCOLOR)

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• [a64] Implement OPCODE_VECTOR_SHA

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• [a64] Implement OPCODE_{SHR,SHA}

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• [a64] Fix StackLayout

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• [a64] Fix Guest-To-Host native calls

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• [a64] Fix memory address generation

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• [a64] Fix indirect and external calls

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• [a64] Fix overwriting of return-value registers

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• [a64] Implement OPCODE_VECTOR_SHL

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• [a64] Remove volatile storing of X0/Q0

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• [a64] Implement OPCODE_VECTOR_{SHR,SHA}

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• [a64] Implement OPCODE_VECTOR_ROTATE_LEFT

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• [a64] Implement OPCODE_VECTOR_MIN

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• [a64] Implement OPCODE_VECTOR_MAX

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• [a64] Implement OPCODE_VECTOR_ADD

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• [a64] Fix native vector calls

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• [a64] Implement OPCODE_PACK(FLOAT16)

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• [a64] Implement OPCODE_PACK(SHORT)

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• [a64] Implement HIR Branch labeling

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• [a64] Implement control sequences

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• [a64] Fix ResolveFunction thunk

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• [a64] Fix resetting of labels during Emplace

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• [a64] Fix ResolveFunctionThunk call

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• [a64] Pad code cache with 0x00 bytes

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• [a64] Draft Windows-ARM64 stack unwinding data

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• [a64] Use X4 for address-generation veneer

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• [a64] Optimize Volatile/NonVolatile push/pop

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• [a64] Refactor thunk prolog/epilog

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• [a64] Update Membase and Context register

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• [a64] Fix emitted function prolog/epilog

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• [a64] Refactor XSP to SP

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• [a64] Implement OPCODE_{LOAD,STORE}_MMIO

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• [a64] Remove redundant zero-extension during address computation

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• [a64] Fix CallIndirect return address

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• [a64] Refactor REV{32,64} to REV

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• [a64] Implement OPCODE_MEMSET

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• [a64] Implement OPCODE_MEMORY_BARRIER

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• [a64] Implement OPCODE_{LOAD,STORE}_LOCAL

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• [a64] Implement OPCODE_ATOMIC_EXCHANGE

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• [a64] Implement OPCODE_ATOMIC_COMPARE_EXCHANGE

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• [a64] Fix ComputeMemoryAddress{Offset} register stomp

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• [a64] Refactor REV{16,32} to REV

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• [a64] Reorganize guest register allocation

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• [a64] Remove standard prolog/epilog from thunks

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• [a64] Fix EmitGetCurrentThreadId type

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• [a64] Fix immediates being too large

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• [a64] Increase function code size to 1MiB

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• [a64] Fix external function call arguments

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• [a64] Fix up-casting zero/sign extensions

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• [a64] Compute memory offsets as 32-bit registers

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• [a64] Use offsetof to reload membase

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• [a64] Fix 32-bit store

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• [a64] Update guest calling conventions

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• [a64] Fix instruction constant generation

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• [a64] Implement multi-arch capstone support

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• [PPC] Add a64 backend testing support

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• [a64] Protect address-generation from imm-overflow

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• [a64] Preserve X0 when resolving functions

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• [a64] Fix ADDC carry-bit assignment

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• [a64] Fix signed MUL_HI

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• [a64] Fix non-const MUL_I32

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• [a64] Implement PERMUTE_V128(int8)

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• [a64] Implement PERMUTE_I32

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• [a64] Implement OPCODE_SWIZZLE

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• [a64] Fix SELECT register usage

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• [a64] Fix SET_ROUNDING_MODE_I32 exception

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• [UI] Implement Arm64 host register info

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• [a64] Implement OPCODE_VECTOR_SUB

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• [a64] Fix PERMUTE_V128 out-of-index case

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• [a64] Fix AND_NOT_V128

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• [a64] Implement VECTOR_COMPARE_{EQ,UGT,UGE,SGT,SGE}_V128

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• [a64] Fix OPCODE_SPLAT

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• [a64] Fix SELECT_V128_V128

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• [a64] Implement OPCODE_VECTOR_AVERAGE

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• [CPU] Fix multi-arch cpu-test support

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• [a64 Fix floating-point BRANCH_FALSE

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• [a64] Refactor OPCODE_ATOMIC_COMPARE_EXCHANGE

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• [a64] Fix OPCODE_MAX

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• [a64] Fix MUL_HI_I32 operands

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• [a64] Fix OPCODE_VECTOR_SHA(constant)

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• [a64] Implement VECTOR_CONVERT_{F2I,I2F}

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• [a64] Fix OPCODE_VECTOR_CONVERT_{I2F,F2I}

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• [a64] Fix FPCR starting bit index

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• [a64] Fix VECTOR_CONVERT_F2I rounding

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• [a64] Implement PERMUTE_V128(int16)

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• [a64] Optimize OPCODE_MUL_ADD

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• [a64] Fix OPCODE_CNTLZ

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• [a64] Implement kDebugInfoTraceFunctions and kDebugInfoTraceFunctionCoverage

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• [a64] Fix ATOMIC_COMPARE_EXCHANGE_I32 comparison type

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• [a64] Implement memory tracing

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• [a64] Reduce function prolog/epilog to 16 bytes

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• [a64] Implement guest-debugger stalk-walks

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• [a64] Implement instruction stepping.

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• [a64] Implement b bl br blr cbnz cbz instruction-stepping

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• [a64] Optimize vector-constant generation

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• [a64] Optimize memory-address calculation

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• [a64] Optimize OPCODE_MEMSET

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• [a64] Implement OPCODE_LOAD_CLOCk clock_source_raw

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• [a64] Implement OPCODE_PACK(2101010, 4202020, 8-in-16, 16-in-32)

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• [a64] Fix OPCODE_PACK saturation edge-cases

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• [a64] Implement OPCODE_UNPACK

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• [a64] Implement LSE and FP16C detection

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• [a64] Optimize OPCODE_{UN}PACK(float16) with F16C

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• [a64] Fix OPCODE_PACK(short)

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• [a64] Optimize bulk VConst access with relative addressing

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• [a64] Optimize constant vector byte-splats

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• [a64] Fix OPCODE_SWIZZLE register-aliasing

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• [a64] Implement raw clock source

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• [a64] Remove VOne constant in favor of FMOV

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• [a64] Add arch-agnostic documentation configurations

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• [a64] Optimize zero MovMem64

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• [a64] Implement OPCODE_DID_SATURATE

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• [a64] Detect MOVI utilizations for vector-element splats(u8,u16,u32)

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• [a64] Optimize constant-loads with FMOV

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• [a64] Implement armv8.0 atomic operations

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• [a64] Remove x64 reference implementations

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• [a64] Implement OPCODE_CACHE_CONTROL

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• [a64] Fix out-of-bounds OPCODE_VECTOR_SHL(all-same) case

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• [a64] Use VectorCodeGenerator rather than CodeBlock+CodeGenerator

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• [a64] Replace instances of MOV+DUP-splats to MOVI`

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• [a64] Optimize OPCODE_SPLAT byte-constants

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• [a64] Optimize OPCODE_SPLAT with MOVI/FMOV

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• [a64] Remove redundant OPCODE_DOT_PRODUCT_{3,4} lane-isolation

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• [a64] Implement support for large stack sizes

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