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[SOL] Add feature flag for disabling lddw
#77
[SOL] Add feature flag for disabling lddw
#77
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@@ -1,4 +1,4 @@ | |||
; RUN: llc -march=sbf -mcpu=sbfv2 -filetype=obj -o - %s | llvm-objdump -d - | FileCheck %s | |||
; RUN: llc -march=sbf -mcpu=sbfv2 -filetype=obj -o - %s | llvm-objdump -d --mcpu=sbfv2 - | FileCheck %s |
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It seem a bit odd that you need to specify sbfv2 on the command line for llvm-objdump. The tool reads ELF header which contains E_FLAGS field, and that field tells whether the ELF file was generated for SBFv2. Maybe we need to fix that to work correctly?
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Good point. I'll investigate that.
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We were not reading the flags from the ELF file, so I fixed this in my last commit. The decoding of mov32 reg, imm
is ambiguous, because it can either refer to a 32-bit register or to a 64-bit register. To circumvent this, I had to add --mattr=+alu32
in some tests.
LGTM, but shouldn't it be rebased and conflicts resolved? |
I was working on it. |
d1f8163
into
anza-xyz:solana-rustc/16.0-2023-06-05
* Fix incorrect obj-dump * Read flag from elf
* Fix incorrect obj-dump * Read flag from elf
This PR is a follow-up to #74. t is better to split the new SBFv2 feature into multiple feature flags, instead of hiding them all behind
--mcpu=sbfv2
. Separate feature flags allow us to test each modification in isolation.The changes in this PR also fix a decoding issue when using
llvm-objdump
. When decodingmov32
instructions, I was printing the 32-bit registers, however, we use 64-bit registers when the ALU32 is disabled.